公开(公告)号：US12027553B2

公开(公告)日：2024-07-02

申请号：US17896401

申请日：2022-08-26

Applicant: GlobalFoundries U.S. Inc.

Inventor： Siva P. Adusumilli ,  Vibhor Jain ,  Alvin J. Joseph ,  Steven M. Shank

IPC: H01L27/146

CPC classification number: H01L27/14629 ,  H01L27/1462 ,  H01L27/1463 ,  H01L27/14685

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to photodetectors with buried airgap mirror reflectors. The structure includes a photodetector and at least one airgap in a substrate under the photodetector.

公开(公告)号：US20240186429A1

公开(公告)日：2024-06-06

申请号：US18062201

申请日：2022-12-06

Applicant: GlobalFoundries U.S. Inc.

Inventor： Rajendran Krishnasamy ,  John J. Ellis-Monaghan ,  Siva P. Adusumilli ,  Ramsey M. Hazbun

IPC: H01L31/0224 ,  H01L31/0312 ,  H01L31/103 ,  H01L31/18

CPC classification number: H01L31/022408 ,  H01L31/03125 ,  H01L31/1037 ,  H01L31/1812

Abstract: A photodiode and a related method of manufacture are disclosed. The photodiode includes a transfer gate and a floating diffusion adjacent to the transfer gate. In addition, the photodiode includes an upper terminal; an intrinsic semiconductor region in contact with the upper terminal, the intrinsic semiconductor region in a trench in a substrate adjacent to the transfer gate; and a lower terminal in contact with the intrinsic semiconductor region. An insulator layer is along an entirety of a sidewall of the intrinsic semiconductor region and between the intrinsic semiconductor region and the transfer gate. A p-type well may also optionally be between the insulator layer and the transfer gate.

公开(公告)号：US20230387333A1

公开(公告)日：2023-11-30

申请号：US17664741

申请日：2022-05-24

Applicant: GlobalFoundries U.S. Inc.

Inventor： Siva P. Adusumilli ,  John J. Ellis-Monaghan ,  Rajendran Krishnasamy ,  Ramsey Hazbun

IPC: H01L31/0216 ,  H01L31/18 ,  H01L31/105

CPC classification number: H01L31/0216 ,  H01L31/1804 ,  H01L31/105 ,  H01L31/022408

Abstract: A photodetector structure includes a first semiconductor material layer on a first portion of a doped well in a substrate. The photodetector structure includes a second semiconductor layer over the first semiconductor layer. The first and second semiconductor material layers may include an undoped semiconductor material. The photodetector structure includes an insulative collar laterally surrounding the first and second semiconductor material layers. The insulative collar may include a varying horizontal thickness. The photodetector structure includes a doped semiconductor material having an opposite doping polarity relative to the doped well, and positioned over the second semiconductor material layer and the insulating collar.

公开(公告)号：US20230324332A1

公开(公告)日：2023-10-12

申请号：US17715282

申请日：2022-04-07

Applicant: GlobalFoundries U.S. Inc.

Inventor： Mark D. Levy ,  Siva P. Adusumilli ,  Aaron L. Vallett

IPC: G01N27/414

CPC classification number: G01N27/4148 ,  G01N27/4145

Abstract: Disclosed is a semiconductor structure including a device (e.g., a field effect transistor (FET), a biosensor FET (bioFET) or an ion-sensitive FET (ISFET)) with a fluid-based gate. The structure includes a substrate, an intermediate layer on the substrate, and a semiconductor layer on the intermediate layer. The device includes, within the semiconductor layer, a source region, a drain region, and a channel region between the source and drain regions. The structure includes, for the fluid-base gate, a cavity within the intermediate layer below the channel region and lined with a dielectric liner. Optionally, the exposed surface of the dielectric liner within the cavity is functionalized. Additional dielectric layers are stacked on the semiconductor layer and at least one port extends essentially vertically through the dielectric layers, the semiconductor layer and the dielectric liner to the cavity so as to allow fluid for the fluid-based gate to flow into the cavity.

公开(公告)号：US20230317869A1

公开(公告)日：2023-10-05

申请号：US17709181

申请日：2022-03-30

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Rajendran Krishnasamy ,  John J. Ellis-Monaghan ,  Siva P. Adusumilli ,  Ramsey Hazbun ,  Steven M. Shank

IPC: H01L31/105 ,  H01L31/0224 ,  H01L31/18

CPC classification number: H01L31/105 ,  H01L31/022408 ,  H01L31/1812

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to photodiodes and methods of manufacture. The structure includes: a top terminal; an intrinsic material in contact with the top terminal; and a bottom terminal in contact with the intrinsic material, the bottom terminal including a P semiconductor material and a fully depleted N semiconductor material.

公开(公告)号：US11777043B1

公开(公告)日：2023-10-03

申请号：US17807887

申请日：2022-06-21

Applicant: GlobalFoundries U.S. Inc.

Inventor： Ramsey M. Hazbun ,  John J. Ellis-Monaghan ,  Rajendran Krishnasamy ,  Siva P. Adusumilli

IPC: H01L31/0352

CPC classification number: H01L31/035281

Abstract: A substrate is formed to include a substrate base and a substrate extension. A photodiode contacts the substrate base. The substrate extension is adjacent the photodiode. An additional device contacts the substrate extension. A sidewall spacer contacts the photodiode and the substrate extension. The additional device includes conductive elements within the substrate extension adjacent the sidewall spacer.

公开(公告)号：US11764225B2

公开(公告)日：2023-09-19

申请号：US17344391

申请日：2021-06-10

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anthony K. Stamper ,  Uzma Rana ,  Siva P. Adusumilli ,  Steven M. Shank

IPC: H01L27/12 ,  H01L29/45 ,  H01L21/84 ,  H01L21/28 ,  H01L21/285 ,  H01L29/49

CPC classification number: H01L27/1203 ,  H01L21/28052 ,  H01L21/28518 ,  H01L21/84 ,  H01L29/45 ,  H01L29/4933

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to field effect transistors and methods of manufacture. The structure includes: at least one gate structure comprising source/drain regions; and at least one isolation structure perpendicular to the at least one gate structure and within the source/drain regions.

公开(公告)号：US11749559B2

公开(公告)日：2023-09-05

申请号：US17983436

申请日：2022-11-09

Applicant: GlobalFoundries U.S. Inc.

Inventor： Steven M. Shank ,  Anthony K. Stamper ,  Ian McCallum-Cook ,  Siva P. Adusumilli

IPC: H01L21/763 ,  H01L29/06 ,  H01L27/12 ,  H01L21/762 ,  H01L21/324 ,  H01L21/84 ,  H01L21/265 ,  H01L21/74 ,  H01L29/32 ,  H01L21/02 ,  H01L27/06 ,  H01L29/10

CPC classification number: H01L21/763 ,  H01L21/26506 ,  H01L21/26526 ,  H01L21/26533 ,  H01L21/324 ,  H01L21/743 ,  H01L21/76267 ,  H01L21/76283 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/0642 ,  H01L29/0649 ,  H01L29/32 ,  H01L21/0217 ,  H01L21/02164 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02271 ,  H01L27/0629 ,  H01L29/1087

Abstract: Structures with altered crystallinity beneath semiconductor devices and methods associated with forming such structures. Trench isolation regions surround an active device region composed of a single-crystal semiconductor material. A first non-single-crystal layer is arranged beneath the trench isolation regions and the active device region. A second non-single-crystal layer is arranged beneath the trench isolation regions and the active device region. The first non-single-crystal layer is arranged between the second non-single-crystal layer and the active device region.

公开(公告)号：US20230037420A1

公开(公告)日：2023-02-09

申请号：US17386062

申请日：2021-07-27

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Johnatan A. Kantarovsky ,  Mark D. Levy ,  Brett T. Cucci ,  Jeonghyun Hwang ,  Siva P. Adusumilli

IPC: H01L29/06 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/778

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to gate structures and methods of manufacture. The structure includes: a gate structure comprising a horizontal portion and a substantially vertical stem portion; and an air gap surrounding the substantially vertical stem portion and having a curved surface under the horizontal portion.

公开(公告)号：US11569170B2

公开(公告)日：2023-01-31

申请号：US17064602

申请日：2020-10-07

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Siva P. Adusumilli ,  Mark David Levy ,  Ramsey Hazbun ,  Alvin Joseph ,  Steven Bentley

IPC: H01L23/535 ,  H01L21/74 ,  H01L21/768 ,  H01L23/367 ,  H01L23/48 ,  H01L29/10 ,  H01L21/8234 ,  H01L27/092 ,  H01L29/778 ,  H01L29/735

Abstract: A semiconductor device is provided, the semiconductor device comprising a substrate having merged cavities in the substrate. An active region is over the merged cavities in the substrate. A thermally conductive layer is in the merged cavities in the substrate, whereby the thermally conductive layer at least partially fills up the merged cavities in the substrate. A first contact pillar connects the thermally conductive layer in the merged cavities in the substrate with a metallization layer above the active region.