公开(公告)号：US20230168810A1

公开(公告)日：2023-06-01

申请号：US17982106

申请日：2022-11-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jiman KWON ,  Dongho KIM ,  Jaehyeon PARK ,  Geonhee BACK ,  Dongwook LEE ,  Daehyun CHO

IPC: G06F3/06

CPC classification number: G06F3/0613 ,  G06F3/0673 ,  G06F3/0653

Abstract: Provided is an apparatus and method for improving the entry speed of a large-memory consuming application in an electric device which detect an execution of an application, check if the application is a large-memory consuming application which uses a large amount of memory, and if the application is the large-memory consuming application, execute pre-process thread reclaim, select a process corresponding to a reclaiming target among processes currently resident in the memory, reclaim part of the memory being used by the selected process without terminating the selected process, and thereby improve the entry speed of a large-memory consuming application.

公开(公告)号：US20230028712A1

公开(公告)日：2023-01-26

申请号：US17701520

申请日：2022-03-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sooyong LEE ,  Dongho KIM ,  Sangwook KIM ,  Jungmin KIM ,  Seunghune YANG ,  Jeeyong LEE ,  Changmook YIM ,  Yangwoo HEO

IPC: G06F30/392 ,  G03F7/20

Abstract: Disclosed is an operating method of an electronic device which includes receiving a design layout for manufacturing the semiconductor device, generating a first layout by performing machine learning-based process proximity correction (PPC), generating a second layout by performing optical proximity correction (OPC), and outputting the second layout for a semiconductor process. The generating of the first layout includes generating a first after cleaning inspection (ACI) layout by executing a machine learning-based process proximity correction module on the design layout, generating a second after cleaning inspection layout by adjusting the design layout based on a difference of the first after cleaning inspection layout and the design layout and executing the process proximity correction module on the adjusted layout, and outputting the adjusted layout as the first layout, when a difference between the second after cleaning inspection layout and the design layout is smaller than or equal to a threshold value.

公开(公告)号：US20220344279A1

公开(公告)日：2022-10-27

申请号：US17510749

申请日：2021-10-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongho KIM ,  Jihwang KIM

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/31

Abstract: A semiconductor package including a semiconductor chip, a lower redistribution layer under the semiconductor chip, the lower redistribution layer including a lower insulating layer at a central region and at a portion of an edge region, and a trench at a remaining portion of the edge region, a plurality of outer connecting terminals under the lower redistribution layer, a molding layer including a first molding section and the second molding section, the first molding section being on the lower redistribution layer and surrounding a side surface of the semiconductor chip and the second molding section being in the trench and contacting a side surface of the lower insulating layer, and an upper redistribution layer on the molding layer may be provided. The side surface of the lower insulating layer and a side surface of the second molding section may be coplanar with each other.

公开(公告)号：US20220173082A1

公开(公告)日：2022-06-02

申请号：US17407647

申请日：2021-08-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongho KIM ,  Ji Hwang KIM ,  Hwan Pil PARK ,  Jongbo SHIM

IPC: H01L25/10 ,  H01L25/065 ,  H01L21/48

Abstract: Provided is a semiconductor package comprising a lower package that includes a lower substrate and a lower semiconductor chip, an interposer substrate on the lower package and having a plurality of holes that penetrate the interposer substrate, a thermal radiation structure that includes a supporter on a top surface of the interposer substrate and a plurality of protrusions in the holes of the interposer substrate, and a thermal conductive layer between the lower semiconductor chip and the protrusions of the thermal radiation structure.

公开(公告)号：US20220116155A1

公开(公告)日：2022-04-14

申请号：US17519818

申请日：2021-11-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongho KIM ,  Jongmin BAIK ,  Jusung LEE

IPC: H04L1/18 ,  H04W72/04 ,  H04B17/309

Abstract: Various embodiments of the disclosure relate to an apparatus and a method for managing a communication buffer of an electronic device in the electronic device. The electronic device includes: a wireless communication circuit, an application processor, and a communication processor operatively connected to the wireless communication circuit and the application processor and including a communication buffer, wherein the communication processor is configured to: identify a Radio Link Control (RLC) retransmission time, identify an uplink transmission rate, and configure a size of an area for storing data in the communication buffer based on the RLC retransmission time and the uplink transmission rate.