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公开(公告)号：US20220122529A1
公开(公告)日：2022-04-21
申请号：US17361549
申请日：2021-06-29
Inventor： Song MENG , Xuehuan FENG
IPC: G09G3/3225
Abstract: The present disclosure relates to the field of display technology, and describes a pixel driving circuit detection method, a display panel, a driving method thereof, and a display device. The detection method includes inputting a reference voltage to the data line during at least part of the initial phase; turning on the first and second switch sub-circuits during the charging phase, to input the detection voltage to the data line, while inputting the reset voltage to the sensing line; turning on the second switch sub-circuit during the charging phase, to input the driving current by the driving transistor to the sensing line under the effect of the detection voltage; turning off the first and second switch sub-circuits during the detection phase, to detect the voltage on the sensing line; and obtaining the mobility of the driving transistor according to the voltage on the sensing line detected in the detection phase.
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公开(公告)号：US20220101796A1
公开(公告)日：2022-03-31
申请号：US17427607
申请日：2021-01-22
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/3266 , G11C19/28
Abstract: A shift register, a gate driving circuit and a gate driving method are provided. The shift register includes: a display pre-charging reset circuit, a display noise reduction circuit and an output circuit, the output circuit is provided with at least one signal output terminal, and includes at least one output sub-circuit; the display pre-charging reset circuit is configured to write a first scanning voltage into a pull-up node in response to a control of a first signal input terminal; and write a second scanning voltage into the pull-up node in response to a control of a second signal input terminal; the display noise reduction circuit is configured to write the second scanning voltage into a pull-down node in response to the control of the first signal input terminal; and write the first scanning voltage into the pull-down node in response to the control of the second signal input terminal.
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公开(公告)号：US20220084457A1
公开(公告)日：2022-03-17
申请号：US17424483
申请日：2020-08-24
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/20
Abstract: The disclosure provides a shift register, a drive method thereof, a gate drive circuit, and a display panel. The shift register comprises a first shift register unit and a second shift register unit. The first shift register unit comprises a first input circuit, a first output circuit, a first pull-down circuit and a unidirectional isolation circuit, the first input circuit is connected to a first input terminal and a first pull-up node, the first output circuit is connected to the first pull-up node, a first output terminal and a first clock terminal, and the first output terminal is connected to the first pull-down circuit by means of the unidirectional isolation circuit; and the second shift register unit comprises a second input circuit and a second output circuit, the second input circuit is connected to a second input terminal and a second pull-up node, the second output circuit is connected to the second pull-up node, a second output terminal and a second clock signal, and the second output terminal is connected to a node between the first pull-down circuit and the unidirectional isolation circuit.
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64.发明授权公开(公告)号：US11250784B2
公开(公告)日：2022-02-15
申请号：US16642469
申请日：2019-07-29
Inventor： Zhidong Yuan , Yongqian Li , Meng Li , Can Yuan
IPC: G09G3/3266 , G11C19/28
Abstract: The present disclosure discloses a shift register, a driving method thereof, a gate drive circuit, an array substrate and a display device. With a signal control circuit, a branch control circuit, a cascade signal output circuit and at least two scan signal output circuits, each shift register can output at least two scan signals to correspond to different gate lines in a display panel. This can reduce the number of shift registers in a gate drive circuit and the space occupied by the gate drive circuit and can achieve an ultra-narrow frame design, as compared with an existing shift register that can only output one scan signal. Moreover, as signals of different output control node do not influence each other, the output stability can also be improved.
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65.发明授权公开(公告)号：US11244630B2
公开(公告)日：2022-02-08
申请号：US17265226
申请日：2020-06-18
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G3/3266 , G09G3/3258 , G11C19/28
Abstract: A shift register unit, a gate driving circuit, a display device, and a method for controlling a shift register unit are provided. The shift register unit includes a first input sub-circuit, a second input sub-circuit, a first isolation sub-circuit, and a first output sub-circuit. The first input sub-circuit is configured to control a potential of a first node. The second input sub-circuit is configured to control a potential of a second node. The first isolation sub-circuit is configured to control conduction and interruption of electrical coupling between the first node and the second node. The first output sub-circuit is configured to output a grate driving signal in a display phase and output a compensation driving signal in a field blanking phase.
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Patent Agency Ranking
公开(公告)号：US11244595B2
公开(公告)日：2022-02-08
申请号：US16957161
申请日：2019-08-08
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G5/00 , G09G3/20 , G09G3/3266 , G09G3/36 , G11C19/28
Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are provided. The shift register unit includes an input circuit, a first control circuit, a blanking control circuit, a first output circuit, and a second output circuit. The input circuit is configured to control a level of a first node in response to an input signal input; the first control circuit is configured to control a level of the second node in response to the input signal and the level of the first node; the blanking control circuit is configured to control the level of the first node and the level of the second node; the first output circuit is configured to output a first output signal at the first output terminal; and the second output circuit is configured to output a second output signal at the second output terminal.
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公开(公告)号：US20220013060A1
公开(公告)日：2022-01-13
申请号：US17294690
申请日：2020-08-20
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/20
Abstract: A shift register and a drive method therefor, and a gate drive circuit. The shift register includes: an input sub-circuit, a detection control sub-circuit, an output sub-circuit, a first reset sub-circuit, and a pull-down sub-circuit. The detection control sub-circuit is respectively connected to a random detection signal end (OE), a signal input end (INPUT), a first clock signal end (CLKA), a first reset end (RST1), and a pull-up node (PU), and is configured to provide a signal of the first clock signal end (CLKA) for the pull-up node (PU) under the control of the signal input end (INPUT), the random detection signal end (OE), the first clock signal end (CLKA), and the first reset end (RST1).
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公开(公告)号：US20220005413A1
公开(公告)日：2022-01-06
申请号：US17294676
申请日：2020-08-07
Inventor： Zhidong YUAN , Xuehuan FENG , Yongqian LI , Can YUAN , Meng LI , Dongxu HAN
IPC: G09G3/3241 , G09G3/3266
Abstract: A pixel circuit and a driving method thereof, and a display device, the pixel circuit being configured to drive a light-emitting element and including: a node control sub-circuit, which is configured to provide a first node with a signal of a data signal end and provide a second node with a signal of a control signal end under the control of a first scanning end; a driving sub-circuit, which is configured to provide the second node with a driving current under the control of the first node and the second node; a storage sub-circuit, which is configured to store electric charge between the first node and the second node; a reading sub-circuit, and the light-emitting element, which is electrically connected to the second node and a second power supply end, respectively.
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公开(公告)号：US20220005400A1
公开(公告)日：2022-01-06
申请号：US17279478
申请日：2020-05-25
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/20
Abstract: The present disclosure discloses a shift register, a gate driving circuit and a display device. The shift register includes a display pre-charge reset circuit, a sensing cascade circuit, a sensing pre-charge reset circuit, a pull-down control circuit and an output circuit, where the display pre-charge reset circuit, the sensing cascade circuit and the sensing pre-charge reset circuit share the same pull-down control circuit and the same output circuit, the output circuit is coupled to at least one signal output terminal, the output circuit includes output sub-circuits in one-to-one correspondence with the at least one signal output terminal, and each output sub-circuit is configured to write a driving clock signal into the corresponding signal output terminal in a display output stage and a sensing output stage in response to a control of a voltage of a pull-up node in an effective level state.
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70.发明申请公开(公告)号：US20210408160A1
公开(公告)日：2021-12-30
申请号：US16963346
申请日：2019-09-27
Inventor： Can Yuan , Yongqian Li , Pan Xu , Zhidong Yuan , Meng Li , Xuehuan Feng , Zehua Ding
IPC: H01L27/32 , G09G3/3225
Abstract: An array substrate includes an array of a plurality of subpixels including a plurality of columns of subpixels respectively spaced apart by a plurality of inter-subpixel regions; a plurality of pixel driving circuits respectively driving light emission of the plurality of subpixels; and a plurality of detection and compensation lead lines respectively configured to respectively detect signals in the plurality of subpixels and respectively compensate signals in the plurality of subpixels. A respective one of a plurality of detection and compensation lead lines is disposed in a first inter-subpixel region between two directly adjacent columns of subpixels. The respective one of the plurality of detection and compensation lead lines is spaced apart by at least one columns of subpixels from a signal line configured to transmit an alternating current and arranged along a direction parallel to the respective one of the plurality of detection and compensation lead lines.
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