公开(公告)号：US20180329291A1

公开(公告)日：2018-11-15

申请号：US15979827

申请日：2018-05-15

Applicant: IMEC VZW ,  Imec USA Nanoelectronics Design Center

Inventor： Marina Timmermans ,  Emily Gallagher ,  Ivan Pollentier ,  Hanns Christoph Adelmann ,  Cedric Huyghebaert ,  Jae Uk Lee

IPC: G03F1/64

CPC classification number: G03F1/64 ,  G03F1/62

Abstract: The present disclosure relates to a method for forming a pellicle for extreme ultraviolet lithography, the method comprising: forming a coating of a first material on a peripheral region of a main surface of a carbon nanotube pellicle membrane, the membrane including a carbon nanotube film, arranging the carbon nanotube pellicle membrane on a pellicle frame with the peripheral region facing a support surface of the pellicle frame, wherein the support surface of the pellicle frame is formed by a second material, and bonding together the coating of the carbon nanotube pellicle membrane and the pellicle support surface by pressing the carbon nanotube pellicle membrane and the pellicle support surface against each other. The present disclosure relates also relates to a method for forming a reticle system for extreme ultraviolet lithography.

公开(公告)号：US20170346493A1

公开(公告)日：2017-11-30

申请号：US15605261

申请日：2017-05-25

Applicant: IMEC VZW ,  Stichting IMEC Nederland ,  Vrije Universiteit Brussel

Inventor： Nereo Markulic ,  Yao-Hong Liu ,  Jan Craninckx

IPC: H03L7/085 ,  H03K5/159 ,  H03L7/099 ,  H03K5/00

CPC classification number: H03L7/085 ,  H03K5/159 ,  H03K2005/00013 ,  H03L7/081 ,  H03L7/0991 ,  H03L7/197 ,  H03L7/1976 ,  H03L2207/50

Abstract: The disclosure provides a phase locked loop, PLL, for phase locking an output signal to a reference signal. The PLL comprises a reference path providing the reference signal to a first input of a phase detector, a feedback loop providing the output signal of the PLL as a feedback signal to a second input of the phase detector, a controllable oscillator generating the output signal based on at least a phase difference between reference and feedback signal, a digital-to-time converter, DTC, delaying a signal that is provided at one of the first and second input, a delay calculation path for calculating a DTC delay value. The PLL further comprises a randomization unit for generating and adding a random offset, i.e. a pseudo-random integer, to the delay value. The offset is such that a target output of the phase detector remains substantially unchanged.

公开(公告)号：US20170172425A1

公开(公告)日：2017-06-22

申请号：US15373322

申请日：2016-12-08

Applicant: IMEC vzw ,  Stichting IMEC Nederland

Inventor： Yao-Hong Liu ,  Marco Mercuri

IPC: A61B5/0205 ,  A61B5/00 ,  A61B5/05 ,  A61B5/024 ,  A61B5/08

Abstract: A method for detecting at least one of a heart rate and a respiratory rate of a subject is disclosed. In one aspect, the method includes transmitting a radio frequency signal towards the subject and receiving a reflected signal from the subject, the reflected signal being Doppler-shifted due to at least one of the heart rate and the respiratory rate. The method also includes providing the reflected signal to a first input of a phase comparator and generating an adjustable reference signal by a reference signal generator. The method further includes providing the reference signal to a second input of the phase comparator and generating an output signal by the phase comparator based on the reflected signal and the reference signal. The method includes varying, by the reference signal generator, at least one of a phase and a frequency of the adjustable reference signal based on the output signal of the phase comparator to track a phase of the reflected signal.

公开(公告)号：US20150005585A1

公开(公告)日：2015-01-01

申请号：US14315520

申请日：2014-06-26

Applicant: IMEC VZW ,  Stichting IMEC Nederland

Inventor： Jiawei Xu ,  Refet Firat Yazicioglu

IPC: A61B5/00 ,  A61B5/0476 ,  A61B5/04 ,  A61B5/0496 ,  A61B5/0428 ,  A61B5/0402 ,  A61B5/0488

CPC classification number: A61B5/7207 ,  A61B5/04004 ,  A61B5/0402 ,  A61B5/0408 ,  A61B5/0428 ,  A61B5/0476 ,  A61B5/0478 ,  A61B5/0488 ,  A61B5/0492 ,  A61B5/0496 ,  A61B2562/0209

Abstract: A biopotential signal acquisition system, comprising: a first active electrode including an integrated pre-amplifier and an analogue to digital converter; a second active electrode including an integrated pre-amplifier and an analogue to digital converter, wherein the second active electrode has variable gain; a test signal generator for generating a test signal at a test frequency and coupling the test signal to the first and/or second active electrodes; and a digital signal processor configured to: process the digital outputs of the first and second active electrodes to derive a gain control signal based on a difference between the first and second active electrode outputs at the test frequency, and apply the gain control signal to the second active electrode. The disclosure also relates to an electronic circuit or device and a biopotential signal acquisition method.

Abstract translation: 一种生物电势信号采集系统，包括：第一有源电极，包括集成前置放大器和模数转换器; 包括集成前置放大器和模数转换器的第二有源电极，其中所述第二有源电极具有可变增益; 测试信号发生器，用于产生测试频率的测试信号，并将测试信号耦合到第一和/或第二有源电极; 以及数字信号处理器，被配置为：处理第一和第二有源电极的数字输出，以基于在测试频率处的第一和第二有源电极输出之间的差异导出增益控制信号，并将增益控制信号施加到 第二活性电极。 本公开还涉及电子电路或装置以及生物电势信号采集方法。

公开(公告)号：US20140070972A1

公开(公告)日：2014-03-13

申请号：US14022351

申请日：2013-09-10

Applicant: IMEC ,  Katholieke Universiteit Leuven, K.U. LEUVEN R&D ,  Stichting IMEC Nederland

Inventor： Alonso Morgado ,  Serena Porrazzo ,  Francesco Cannillo

IPC: H03M3/00

CPC classification number: H03M3/32 ,  H03M3/426 ,  H03M3/452

Abstract: A circuit for digitizing a sum of a first input signal and a plurality of second input signals has a passive adder that sums the second input signals and outputs a summation signal and a multi-bit quantizer circuit. The quanitzer circuit compares the summation signal at a first comparator input with a signal at a second comparator input, which is derived from the first input signal and has an appropriate polarity so that the difference between the summation signal and the signal at the second comparator input is indicative of the sum of the first input signal and the plurality of second input signals. The comparator also produces a comparator output signal based on the sum of the first input signal and the plurality of second input signals. The quantizer circuit also has a control logic block for determining a multi-bit representation of the sum from the comparator output signal.

Abstract translation: 用于对第一输入信号和多个第二输入信号的和进行数字化的电路具有对第二输入信号求和并输出求和信号和多位量化器电路的无源加法器。 量化器电路将第一比较器输入端的求和信号与第二比较器输入端的信号进行比较，该第二比较器输入端从第一输入信号导出并具有适当的极性，使得求和信号与第二比较器输入端的信号之间的差值 表示第一输入信号和多个第二输入信号的和。 比较器还基于第一输入信号和多个第二输入信号的和产生比较器输出信号。 量化器电路还具有用于确定来自比较器输出信号的和的多位表示的控制逻辑块。

公开(公告)号：US20250154447A1

公开(公告)日：2025-05-15

申请号：US18942722

申请日：2024-11-10

Applicant: Imec vzw

Inventor： Olivier Henry

IPC: C12M1/34 ,  C12M1/00

Abstract: A measurement system is provided for in situ calibration. The measurement system includes a housing including a culture medium and measurement probe arranged in the culture medium. The measurement probe includes an opening, a sensor, and a channel arranged from the opening to the sensor. The measurement system further includes a calibration unit connected to the opening and configured to supply a calibration fluid to the sensor via the channel.

公开(公告)号：US20250151479A1

公开(公告)日：2025-05-08

申请号：US18834168

申请日：2023-02-27

Applicant: MICLEDI MICRODISPLAYS BV ,  IMEC VZW ,  UNIVERSITEIT GENT

Inventor： Geert VAN STEENBERGE ,  Soeren STEUDEL

IPC: H10H20/851 ,  B82Y20/00 ,  H01L25/075 ,  H10H20/01 ,  H10H20/814 ,  H10H29/30

Abstract: An optoelectronic device (100) comprises a semiconductor light-emitting component (101) capable of emitting light at a first wavelength, a cavity (107) filled with a semiconductor wavelength conversion material (103) disposed in a path of the light emitted by the semiconductor light-emitting component (101) for converting the first wave-length into a second wavelength and a first multilayer interference reflector (105) provided at a bottom of the cavity (107) directed to the light-emitting component (101). The first multilayer interference reflector (105) is configured to be transmitive for the first wavelength and reflective for the second wavelength and a second multilayer interference reflector (106) is provided at a top (106′) and sidewalls (106″) of the cavity (107). The second multilayer interference reflector (106) is configured to be transmitive for the second wavelength and to be reflective for the first wavelength. An associated method of making the optoelectronic device is also provided.

公开(公告)号：US12279911B2

公开(公告)日：2025-04-22

申请号：US18042243

申请日：2021-07-01

Applicant: IMEC VZW

Inventor： Florian De Roose ,  Kris Myny

IPC: A61B8/00

Abstract: This patent disclosure relates to an ultrasound transducer including an array of ultrasound transducing elements, a plurality of transducer drive lines. The ultrasound transducer further includes an array of control circuits, wherein each individual control circuit includes a drive switch and a memory element, the drive switch comprising at least one thin-film transistor, the memory element being configured to store and control the state of the drive switch. The ultrasound transducer further configured so each individual ultrasound transducing element of the array of ultrasound transducing elements has one associated control circuit of the array of control circuits and one associated transducer drive line of the plurality of transducer drive lines, and wherein the ultrasound transducer is configured to, for each individual ultrasound transducing element, drive the individual ultrasound transducing element by the associated transducer drive line when the drive switch of the associated control circuit is in the on-state.

公开(公告)号：US20250118691A1

公开(公告)日：2025-04-10

申请号：US18906875

申请日：2024-10-04

Applicant: IMEC VZW

Inventor： Jaber Derakhshandeh ,  Eric Beyne

IPC: H01L23/00 ,  H01L21/56

Abstract: A semiconductor including a plurality of structured contacts suitable for forming electrical connections to respective contacts of another semiconductor component, wherein each of said structured contacts comprises a planar contact surface and a plurality of upright tube-shaped structures extending outward from the planar contact surface is disclosed. The tube-shaped structures may be arranged in a regular array on the respective contact surfaces and are produced by a sequence of steps including the patterning of a dielectric layer formed on the front surface of the component, said patterning resulting in openings in said dielectric layer, and the deposition of a conformal layer on said patterned dielectric layer, thereby lining the bottom and sidewalls of the openings. The conformal layer may be removed from the upper surface of the dielectric layer and the material of said layer is removed selectively with respect to the conformal layer, resulting in said tube-shaped structures.

公开(公告)号：US12259546B2

公开(公告)日：2025-03-25

申请号：US17634023

申请日：2020-08-05

Applicant: ASML NETHERLANDS B.V. ,  IMEC v.z.w.

Inventor： Alexandre Halbach ,  Nitesh Pandey ,  Sebastianus Adrianus Goorden ,  Veronique Rochus ,  Luc Roger Simonne Haspeslagh ,  Guilherme Brondani Torri

IPC: G02B26/08 ,  B81B3/00 ,  B81B7/00 ,  G03F7/00

Abstract: A micromirror array includes a substrate, a plurality of mirrors for reflecting incident radiation, and for each mirror of the plurality of mirrors, a respective post connecting the substrate to the respective mirror. The micromirror array further includes, for each mirror of the plurality of mirrors, one or more electrostatic actuators connected to the substrate for applying force to the respective post to displace the respective post relative to the substrate, thereby displacing the respective mirror. Also disclosed is a method of forming such a micromirror array. The micromirror array may be used in a programmable illuminator. The programmable illuminator may be used in a lithographic apparatus and/or in an inspection apparatus.