Abstract:
One embodiment of the present invention relates to a method of forming an isolation structure. During this method, an isolation trench is formed within a semiconductor body. After this trench is formed, it is filled by performing multiple high-frequency plasma depositions to deposit multiple dielectric layers over the semiconductor body. A first of the multiple layers is deposited at a high-frequency power of between approximately 100 watts and approximately 900 watts.
Abstract:
The present invention provides a method for manufacturing a semiconductor device. The method for manufacturing the semiconductor device, among other steps, may include forming a gate structure over a substrate, forming at least a portion of gate sidewall spacers proximate sidewalls of the gate structure, and subjecting the at least a portion of the gate sidewall spacers to an energy beam treatment, the energy beam treatment configured to change a stress of the at least a portion of the gate sidewall spacers, and thus change a stress in the substrate therebelow.
Abstract:
An optical/electrical transmission type acupuncture needle, controller and system for acupuncture treatment. The needle has a sharpened needle point one end configured for penetration into body tissue and a needle holder at the other end. The needle body is formed of a central optical transmission core, preferably an intermediate opaque non-conductive clad layer atop the core and an outer conductive layer positioned atop the clad layer, all of which are substantially coextensive one to another. The needle point is formed as a unit with the needle body by tapering, sharpening and highly polishing one end portion of the core sufficiently for body tissue penetration. The core carries light provided by a light source in the system controller which may simultaneously provide pulsed electricity carried by the outer conductive layer whereby pulsed light and electricity are transmitted into body tissue through the needle point.
Abstract:
The present invention provides a system for preventing excess silicon consumption in a semiconductor wafer by depositing a metal layer (114) on top of a native oxide layer above a silicide layer (110) of the semiconductor wafer and then reducing the native oxide layer to form low resistance contacts. The native oxide layer is reduced using a rapid thermal annealing process within a temperature range to preserve the integrity of the silicide layer (110) and reduce excess silicon consumption. The temperature range can be greater than 350° C. and less than 615° C., but is optimal between 485° C. to 550° C.
Abstract:
Semiconductor structures having dielectric material layers that are below 3 nanometers in thickness can now be measured with greater precision and in less time using a SIMS device. In an example embodiment of the present invention, a method of measuring the thickness of a dielectric material layer of a semiconductor structure formed on a substrate includes directing a high energy ion beam at a portion of the substrate and sputtering off a plurality of targeted ions from the substrate. The thickness of the dielectric material layer is then determined as a function of a dosage level of the targeted ion and a density of the targeted ion in the dielectric material.
Abstract:
A method for the preparation of a sucrose 6-ester comprises:(i) reacting sucrose with a ketene acetal in the presence of an acid catalyst in an inert organic solvent to form a sucrose alkyl 4, 6-orthoester;(ii) subjecting the sucrose alkyl 4, 6-orthoester to mild acidic hydrolysis to provide a mixture of 4- and 6-monoesters of sucrose; and(iii) treating the mixture of sucrose monoesters with a base to convert the sucrose 4-ester into sucrose 6-ester. Sucralose may be prepared by chlorination of sucrose 6-esters prepared according to the invention.