Shallow trench isolation devices and methods
    61.
    发明申请
    Shallow trench isolation devices and methods 有权
    浅沟槽隔离装置及方法

    公开(公告)号:US20080157264A1

    公开(公告)日:2008-07-03

    申请号:US11654329

    申请日:2007-01-17

    CPC classification number: H01L21/76224 H01L21/823481

    Abstract: One embodiment of the present invention relates to a method of forming an isolation structure. During this method, an isolation trench is formed within a semiconductor body. After this trench is formed, it is filled by performing multiple high-frequency plasma depositions to deposit multiple dielectric layers over the semiconductor body. A first of the multiple layers is deposited at a high-frequency power of between approximately 100 watts and approximately 900 watts.

    Abstract translation: 本发明的一个实施例涉及形成隔离结构的方法。 在该方法中,在半导体本体内形成隔离沟槽。 在形成该沟槽之后,通过执行多个高频等离子体沉积来填充半导体本体上的多个电介质层。 多层中的第一层以约100瓦至约900瓦的高频功率沉积。

    METHOD FOR MANUFACTURING A GATE SIDEWALL SPACER USING AN ENERGY BEAM TREATMENT
    62.
    发明申请
    METHOD FOR MANUFACTURING A GATE SIDEWALL SPACER USING AN ENERGY BEAM TREATMENT 有权
    使用能量束处理方法制造闸门间隔板的方法

    公开(公告)号:US20080076225A1

    公开(公告)日:2008-03-27

    申请号:US11533798

    申请日:2006-09-21

    Abstract: The present invention provides a method for manufacturing a semiconductor device. The method for manufacturing the semiconductor device, among other steps, may include forming a gate structure over a substrate, forming at least a portion of gate sidewall spacers proximate sidewalls of the gate structure, and subjecting the at least a portion of the gate sidewall spacers to an energy beam treatment, the energy beam treatment configured to change a stress of the at least a portion of the gate sidewall spacers, and thus change a stress in the substrate therebelow.

    Abstract translation: 本发明提供一种制造半导体器件的方法。 除了其他步骤之外,用于制造半导体器件的方法可以包括在衬底上形成栅极结构,形成靠近栅极结构的侧壁的栅极侧壁间隔的至少一部分,以及使栅极侧壁间隔物的至少一部分 能量束处理被配置为改变栅极侧壁间隔物的至少一部分的应力,从而改变其下的衬底中的应力。

    Optical/electrical acupuncture needle and system
    63.
    发明授权
    Optical/electrical acupuncture needle and system 失效
    光/电针灸针及系统

    公开(公告)号:US06916329B1

    公开(公告)日:2005-07-12

    申请号:US10136783

    申请日:2002-04-30

    Applicant: Ruan Jin Zhao

    Inventor: Ruan Jin Zhao

    Abstract: An optical/electrical transmission type acupuncture needle, controller and system for acupuncture treatment. The needle has a sharpened needle point one end configured for penetration into body tissue and a needle holder at the other end. The needle body is formed of a central optical transmission core, preferably an intermediate opaque non-conductive clad layer atop the core and an outer conductive layer positioned atop the clad layer, all of which are substantially coextensive one to another. The needle point is formed as a unit with the needle body by tapering, sharpening and highly polishing one end portion of the core sufficiently for body tissue penetration. The core carries light provided by a light source in the system controller which may simultaneously provide pulsed electricity carried by the outer conductive layer whereby pulsed light and electricity are transmitted into body tissue through the needle point.

    Abstract translation: 一种光/电传输型针灸针,针灸治疗系统。 针具有锐化的针尖一端,其构造成用于穿透到身体组织中,另一端具有针保持器。 针体由中心光传输芯,优选地在核心顶部的中间不透明不导电覆盖层和位于覆盖层顶部的外导电层形成,所有这些层都基本上是相互延伸的。 通过使芯体的一端部进行锥形化,锐化和高度抛光,使针尖形成为针体的单位,以使身体组织穿透充分。 芯体在系统控制器中携带由光源提供的光,其可以同时提供由外导电层携带的脉冲电,由此脉冲光和电通过针尖传输到身体组织。

    System for preventing excess silicon consumption in ultra shallow junctions
    64.
    发明授权
    System for preventing excess silicon consumption in ultra shallow junctions 有权
    用于防止超浅结的多余硅消耗的系统

    公开(公告)号:US06734099B2

    公开(公告)日:2004-05-11

    申请号:US10315499

    申请日:2002-12-10

    CPC classification number: H01L21/324 H01L21/28518 H01L29/665

    Abstract: The present invention provides a system for preventing excess silicon consumption in a semiconductor wafer by depositing a metal layer (114) on top of a native oxide layer above a silicide layer (110) of the semiconductor wafer and then reducing the native oxide layer to form low resistance contacts. The native oxide layer is reduced using a rapid thermal annealing process within a temperature range to preserve the integrity of the silicide layer (110) and reduce excess silicon consumption. The temperature range can be greater than 350° C. and less than 615° C., but is optimal between 485° C. to 550° C.

    Abstract translation: 本发明提供了一种用于通过在半导体晶片的硅化物层(110)上方的自然氧化物层的顶部上沉积金属层(114)并且然后还原天然氧化物层形成来防止半导体晶片中多余的硅消耗的系统 低电阻触点。 在温度范围内使用快速热退火工艺来还原天然氧化物层以保持硅化物层(110)的完整性并减少多余的硅消耗。 温度范围可以大于350℃且小于615℃,但在485℃至550℃之间是最佳的。

    Method of measuring dielectric layer thickness using SIMS
    65.
    发明授权
    Method of measuring dielectric layer thickness using SIMS 失效
    使用SIMS测量介电层厚度的方法

    公开(公告)号:US06248603B1

    公开(公告)日:2001-06-19

    申请号:US09615393

    申请日:2000-07-13

    CPC classification number: G01N23/00 H01L22/12

    Abstract: Semiconductor structures having dielectric material layers that are below 3 nanometers in thickness can now be measured with greater precision and in less time using a SIMS device. In an example embodiment of the present invention, a method of measuring the thickness of a dielectric material layer of a semiconductor structure formed on a substrate includes directing a high energy ion beam at a portion of the substrate and sputtering off a plurality of targeted ions from the substrate. The thickness of the dielectric material layer is then determined as a function of a dosage level of the targeted ion and a density of the targeted ion in the dielectric material.

    Abstract translation: 具有低于3纳米厚度的介电材料层的半导体结构现在可以使用SIMS器件以更高的精度和更少的时间来测量。 在本发明的示例性实施例中,测量形成在衬底上的半导体结构的电介质材料层的厚度的方法包括在衬底的一部分处引导高能量离子束,并溅射多个靶离子 底物。 然后确定介电材料层的厚度作为目标离子的剂量水平和介电材料中目标离子的密度的函数。

    Process for the preparation of sucrose 6-esters
    66.
    发明授权
    Process for the preparation of sucrose 6-esters 失效
    蔗糖6-酯的制备方法

    公开(公告)号:US5440026A

    公开(公告)日:1995-08-08

    申请号:US886633

    申请日:1992-05-21

    CPC classification number: C07H13/04

    Abstract: A method for the preparation of a sucrose 6-ester comprises:(i) reacting sucrose with a ketene acetal in the presence of an acid catalyst in an inert organic solvent to form a sucrose alkyl 4, 6-orthoester;(ii) subjecting the sucrose alkyl 4, 6-orthoester to mild acidic hydrolysis to provide a mixture of 4- and 6-monoesters of sucrose; and(iii) treating the mixture of sucrose monoesters with a base to convert the sucrose 4-ester into sucrose 6-ester. Sucralose may be prepared by chlorination of sucrose 6-esters prepared according to the invention.

    Abstract translation: 蔗糖-6-酯的制备方法包括:(i)在酸催化剂存在下,在惰性有机溶剂中使蔗糖与乙烯酮缩醛反应,形成蔗糖烷基4,6-起始酯; (ii)使蔗糖烷基酯4,6-起始酯进行温和的酸性水解以提供蔗糖的4-和6-单酯的混合物; 和(iii)用碱处理蔗糖单酯的混合物以将蔗糖4-酯转化成蔗糖6-酯。 三氯蔗糖可以通过根据本发明制备的蔗糖6-酯的氯化来制备。

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