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    Nonvolatile memory device
    61.
    发明授权
    Nonvolatile memory device 失效
    非易失性存储器件

    公开(公告)号：US5633821A

    公开(公告)日：1997-05-27

    申请号：US374221

    申请日：1995-01-18

    Applicant: Kiyoshi Nishimura ,  Hideki Hayashi ,  Jun Muramoto ,  Takaaki Fuchikami ,  Hiromi Uenoyama

    Inventor： Kiyoshi Nishimura ,  Hideki Hayashi ,  Jun Muramoto ,  Takaaki Fuchikami ,  Hiromi Uenoyama

    IPC: G11C14/00 ,  G11C11/22 ,  G11C16/04 ,  G11C17/00 ,  H01L21/8247 ,  H01L27/10 ,  H01L29/788 ,  H01L29/792 ,  H01L29/78

    CPC classification number: G11C11/22 ,  G11C11/223

    Abstract: A nonvolatile memory with a simple structure where recorded information can be read without destruction. A voltage is impressed between a control gate and a memory gate for writing. A ferroelectric layer is polarized in accordance with the direction of the impressed voltage. A control gate voltage to make channel is small when the ferroelectric layer is polarized with the control gate side being positive. Control gate voltage to make channel is large when the ferroelectric layer is polarized with the control gate side being negative. The reference voltage is impressed on the control gate for reading. A large drain current flows when the ferroelectric layer is polarized with a second polarization and a small drain current flows when the ferroelectric layer is polarized with a first polarization. Record information can be read by detecting the drain current. Polarization status of the ferroelectric is not destroyed in the reading operation.

    Abstract translation: 具有简单结构的非易失性存储器，可以无损地读取记录信息。 在控制门和用于写入的存储器门之间施加电压。 铁电层根据外加电压的方向极化。 当铁电层在控制栅极侧为正极极化时，使沟道的控制栅极电压较小。 当铁电层在控制栅极侧为负极极化时，控制栅极电压使沟道大。 参考电压施加在控制门上用于读取。 当铁电层以第二偏振极化时，大的漏极电流流动，而当铁电层以第一偏振极化时，小的漏极电流流过。 通过检测漏极电流可以读取记录信息。 在阅读操作中铁电的极化状态不会被破坏。

    Microcomputer having an instruction decoder with a fixed area and a rewritable area
    62.
    发明授权
    Microcomputer having an instruction decoder with a fixed area and a rewritable area 失效
    具有具有固定区域和可重写区域的指令解码器的微计算机

    公开(公告)号：US5619714A

    公开(公告)日：1997-04-08

    申请号：US390428

    申请日：1995-02-17

    Applicant: Kiyoshi Nishimura

    Inventor： Kiyoshi Nishimura

    IPC: G06F9/22 ,  G06F9/30 ,  G06F9/318

    CPC classification number: G06F9/30145 ,  G06F9/30181

    Abstract: When a rewriting instruction data is provided to an instruction decoder from a read only memory for a program, the instruction decoder decodes the data and provides an instruction rewriting control signal to a writing block. Thereby, the writing block receives a data following the writing instruction data from the ROM and writes the received data in the rewritable area of the instruction decoder. When an instruction data is provided to the instruction decoder from the read only memory under this condition, an instruction which is different from the instruction therefor output when there is no rewriting instruction is therefor output based on the same instruction.

    Abstract translation: 当从用于程序的只读存储器向指令解码器提供重写指令数据时，指令解码器对数据进行解码并向写入块提供指令重写控制信号。 因此，写入块从ROM接收写入指令数据之后的数据，并将接收到的数据写入指令解码器的可重写区域。 当在该条件下从只读存储器向指令解码器提供指令数据时，在不存在重写指令的情况下，不同于其输出的指令的指令基于同一指令进行输出。

    Nonvolatile memory
    63.
    发明授权
    Nonvolatile memory 失效
    非易失性存储器

    公开(公告)号：US5592409A

    公开(公告)日：1997-01-07

    申请号：US374216

    申请日：1995-01-18

    Applicant: Kiyoshi Nishimura ,  Hideki Hayashi ,  Jun Muramoto ,  Takaaki Fuchikami ,  Hiromi Uenoyama

    Inventor： Kiyoshi Nishimura ,  Hideki Hayashi ,  Jun Muramoto ,  Takaaki Fuchikami ,  Hiromi Uenoyama

    IPC: G11C14/00 ,  G11C11/22 ,  G11C16/04 ,  G11C17/00 ,  H01L21/8246 ,  H01L21/8247 ,  H01L27/10 ,  H01L27/105 ,  H01L29/788 ,  H01L29/792

    CPC classification number: G11C11/22 ,  G11C11/223

    Abstract: Nonvolatile memory with a simple structure where recorded information can be read without destruction: Voltage is impressed between control gate CG and memory gate MG at a writing operation. A ferroelectric layer 32 is polarized in accordance with the direction of the impressed voltage. The control gate voltage V.sub.CG to make a channel is low when the ferroelectric layer 32 is polarized with the control gate side being positive (polarized with second status). The control gate voltage V.sub.CG to make a channel is high when the ferroelectric layer 32 is polarized with the control gate side being negative (polarized with the first status). The reference voltage V.sub.ref is impressed to the control gate CG at the reading operation. A high drain current flows when the ferroelectric layer is polarized with the second status and low drain current flows when the ferroelectric layer is polarized with the first status. Recorded information can be read by detecting the drain current. With this reading operation, the polarization status is not destroyed.

    Abstract translation: 具有简单结构的非易失性存储器，其中记录的信息可以被读取而不会被破坏：在写入操作时在控制栅极CG和存储器门MG之间施加电压。 铁电层32根据外加电压的方向极化。 当铁电层32被极化而控制栅极侧为正极化（第二状态极化）时，使沟道的控制栅极电压VCG较低。 当铁电层32在控制栅极侧为负极化（以第一状态极化）为极化时，使沟道的控制栅极电压VCG较高。 参考电压Vref在读取操作时被施加到控制栅极CG。 当铁电层以第二状态极化并且当铁电层以第一状态极化时，低漏极电流流动时，高漏极电流流动。 通过检测漏极电流可以读取记录的信息。 通过这种阅读操作，极化状态不会被破坏。

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