ANALYSIS OF MEMORY SUB-SYSTEMS BASED ON THRESHOLD DISTRIBUTIONS

    公开(公告)号:US20220215261A1

    公开(公告)日:2022-07-07

    申请号:US17706256

    申请日:2022-03-28

    Abstract: Disclosed is a system comprising a memory component having a plurality of memory cells capable of being in a plurality of states, each state of the plurality of states corresponding to a value stored by the memory cell, and a processing device, operatively coupled with the memory component, to perform operations comprising: obtaining, for the plurality of memory cells, a plurality of distributions of threshold voltages, wherein each of the plurality of distributions corresponds to one of the plurality of states, classifying each of the plurality of distributions among one of a plurality of classes, generating a vector comprising a plurality of components, wherein each of the plurality of components represents the class of a respective one of the plurality of distributions, and processing, using a classifier, the generated vector to determine a likelihood that the memory component will fail within a target period of time.

    THERMAL CHAMBER FOR A THERMAL CONTROL COMPONENT

    公开(公告)号:US20210391319A1

    公开(公告)日:2021-12-16

    申请号:US17459589

    申请日:2021-08-27

    Abstract: A thermal chamber includes a cavity that is enclosed by sides and one or more ports that expose the cavity within the thermal chamber. Each of the one or more ports is configured to receive a temperature control component having a solid physical structure and configured to transfer thermal energy to and from an electrical device exposed via the cavity. The thermal chamber includes a bottom side open area of the thermal chamber located below the one or more ports. The bottom side open area is configured to allow the temperature control component to contact the electrical device that is exposed via the bottom side open area.

    Trim setting determination for a memory device

    公开(公告)号:US10535415B2

    公开(公告)日:2020-01-14

    申请号:US15802597

    申请日:2017-11-03

    Abstract: Apparatuses and methods related to a memory system including a controller and an array of memory cells are provided. An apparatus can include a controller configured to receive operational characteristics of an array of memory cells based on prior operations performed by the array of memory cells, determine a set of trim settings for the array of memory cells based on the operational characteristics of the array of memory cells, wherein the set of trim settings are associated with desired operational characteristics for the array of memory cells, and send the set of trim settings to the array of memory cells.

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