公开(公告)号：US20120229441A1

公开(公告)日：2012-09-13

申请号：US13163728

申请日：2011-06-20

Applicant: Chun-Chieh Wang ,  Tung-Hsin Lan ,  Yu-Ting Lin ,  Chia-Hua Chang

Inventor： Chun-Chieh Wang ,  Tung-Hsin Lan ,  Yu-Ting Lin ,  Chia-Hua Chang

IPC: G09G3/36 ,  G09G5/00

CPC classification number: G09G3/3655 ,  G09G3/3648 ,  G09G3/3677 ,  G09G2320/0209

Abstract: A liquid crystal display (LCD) panel includes a plurality of scan lines, a plurality of data lines, a plurality of common electrode lines, a plurality of pixel units, and at least one voltage regulating chip. The pixel units are coupled to the corresponding scan lines, the corresponding data lines, and the corresponding common electrode lines, respectively. The voltage regulating chip is coupled to a regulated voltage and the common electrode lines, so as to provide a regulated current to each of the common electrode lines based on the regulated voltage, respectively.

Abstract translation: 液晶显示器（LCD）面板包括多条扫描线，多条数据线，多条公共电极线，多个像素单元和至少一个电压调节芯片。 像素单元分别耦合到对应的扫描线，对应的数据线和相应的公共电极线。 电压调节芯片被耦合到调节电压和公共电极线，以分别基于调节电压为每个公共电极线提供调节电流。

公开(公告)号：US20110159629A1

公开(公告)日：2011-06-30

申请号：US12981429

申请日：2010-12-29

Applicant: Hung-Chun Tsai ,  Liang-Ji Chen ,  Yu-Ting Lin ,  Yaw-Ming Tsai

Inventor： Hung-Chun Tsai ,  Liang-Ji Chen ,  Yu-Ting Lin ,  Yaw-Ming Tsai

IPC: H01L31/18

CPC classification number: H01L31/076 ,  H01L31/022425 ,  Y02E10/548

Abstract: A method for manufacturing three-terminal solar cell array is provided. In this method, only four major scribing or etching steps are needed to expose the three conductive layers of the three-terminal solar cell and isolate the individual solar cells.

Abstract translation: 提供一种制造三端子太阳能电池阵列的方法。 在这种方法中，仅需要四个主要的划线或蚀刻步骤来暴露三端子太阳能电池的三个导电层并隔离各个太阳能电池。

公开(公告)号：US20110146761A1

公开(公告)日：2011-06-23

申请号：US12965809

申请日：2010-12-10

Applicant: Chen-Yu Yang ,  Yu-Ting Lin ,  Cheng-Hsin Chen

Inventor： Chen-Yu Yang ,  Yu-Ting Lin ,  Cheng-Hsin Chen

IPC: H01L31/048

CPC classification number: H02S20/00 ,  Y02E10/50

Abstract: A solar module array includes a plurality of solar cell modules. Each solar cell module includes a solar cell panel and a metal frame for securing the solar cell panel. The metal frame includes an upper horizontal member, a lower horizontal member and a vertical member. The upper horizontal member is for holding the solar cell panel. The vertical member is interconnected between the upper and lower horizontal members, and a set of bolt and nut electrically connect any adjacent-two vertical members. In an alternate way, the auxiliary member extends from the vertical member, and a set of bolt and nut electrically connect two overlapped auxiliary members of any adjacent-two vertical members.

Abstract translation: 太阳能模块阵列包括多个太阳能电池模块。 每个太阳能电池模块包括太阳能电池板和用于固定太阳能电池板的金属框架。 金属框架包括上水平构件，下水平构件和垂直构件。 上部水平构件用于固定太阳能电池板。 垂直构件在上部和下部水平构件之间互连，并且一组螺栓和螺母将任何相邻的两个垂直构件电连接。 在另一种方式中，辅助构件从垂直构件延伸，并且一组螺栓和螺母电连接任何相邻的两个垂直构件的两个重叠的辅助构件。

公开(公告)号：US20100189364A1

公开(公告)日：2010-07-29

申请号：US12512575

申请日：2009-07-30

Applicant: Ya-Hui Tsai ,  Kuo-Tang Huang ,  Yu-Ting Lin ,  Chun-Lung Chang ,  Tung-Chuan Wu

Inventor： Ya-Hui Tsai ,  Kuo-Tang Huang ,  Yu-Ting Lin ,  Chun-Lung Chang ,  Tung-Chuan Wu

IPC: G06K9/62

CPC classification number: G06K9/3258 ,  G06K2209/15

Abstract: The present invention provides a method and system for image identification and identification result output, wherein a feature image under identification acquired from an image is compared with a plurality of sample images respectively stored in a database so as to obtain a plurality of similarity indexes associated with the plurality of sample images respectively. Each similarity index represents similarity between the feature image and the corresponding sample image. Thereafter, the plurality of similarity indexes are sorted and then a least one of comparison results is output. The present invention is further capable of being used for identifying identification marks with respect to a carrier. By sorting the similarity index with respect to each feature forming the identification marks, it is capable of outputting many sets of combinations corresponding to the identification marks so as to improve speed for targetting suspected carrier and enhance the identification efficiency.

Abstract translation: 本发明提供了一种用于图像识别和识别结果输出的方法和系统，其中将从图像获取的识别下的特征图像与分别存储在数据库中的多个样本图像进行比较，以获得与 多个样本图像。 每个相似性指数表示特征图像和相应样本图像之间的相似度。 此后，对多个相似度索引进行排序，然后输出至少一个比较结果。 本发明还能够用于识别相对于载体的识别标记。 通过对构成识别标记的每个特征进行相似性索引的排序，能够输出与识别标记对应的许多组合，从而提高针对疑似携带者的速度，提高识别效率。

公开(公告)号：US20080173945A1

公开(公告)日：2008-07-24

申请号：US11655896

申请日：2007-01-22

Applicant: Yi-Hsun Wu ,  Yan-Chih Jiang ,  Yu-Chang Lin ,  Jian-Hsing Lee ,  Shih-Hsorng Shen ,  Yu-Ting Lin ,  Yun-Sheng Huang

Inventor： Yi-Hsun Wu ,  Yan-Chih Jiang ,  Yu-Chang Lin ,  Jian-Hsing Lee ,  Shih-Hsorng Shen ,  Yu-Ting Lin ,  Yun-Sheng Huang

IPC: H01L23/60 ,  H01L21/00

CPC classification number: H01L23/60 ,  H01L23/585 ,  H01L24/11 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A semiconductor device formed in a semiconductor substrate for dissipating electrostatic discharge and/or accumulated charge in an integrated circuit is provided. In one embodiment, the device comprises a semiconductor substrate; a plurality of layers of metal lines formed overlying the substrate; a plurality of via plugs through intermetal dielectric layers between the layers of metal lines and wherein the via plugs interconnect the metal lines; and a dummy pad formed over the plurality of layers of metal lines, the dummy pad having a diode connected thereto and to ground for providing a discharge path for the electrostatic discharge and/or accumulated charge.

Abstract translation: 提供了形成在用于在集成电路中消散静电放电和/或累积电荷的半导体衬底中的半导体器件。 在一个实施例中，该器件包括半导体衬底; 形成在衬底上的多层金属线; 多个通孔插塞穿过所述金属线层之间的金属间电介质层，并且其中所述通孔插塞互连金属线; 以及形成在所述多个金属线层上的虚拟焊盘，所述虚设焊盘具有连接到其上的二极管并接地以提供用于静电放电和/或累积电荷的放电路径。

公开(公告)号：US20060183042A1

公开(公告)日：2006-08-17

申请号：US11060636

申请日：2005-02-16

Applicant: Wen-Yao Huang ,  Yen-Cheng Tsai ,  Jun-Lung Lee ,  Shih-Chien Chiu ,  Chih-Hwa Cherng ,  Chung-Chih Wu ,  Wen-Yi Hung ,  Yu-Ting Lin ,  Tsung-Li Liu ,  Ping-Yuan Hsieh ,  Ken-Tsung Wong ,  Fu-Chuan Fang ,  Yuh-Yih Chien ,  Chung-Feng Wang ,  Ruei-Tang Chen ,  Teng-Chih Chao ,  You-Ming Chen

Inventor： Wen-Yao Huang ,  Yen-Cheng Tsai ,  Jun-Lung Lee ,  Shih-Chien Chiu ,  Chih-Hwa Cherng ,  Chung-Chih Wu ,  Wen-Yi Hung ,  Yu-Ting Lin ,  Tsung-Li Liu ,  Ping-Yuan Hsieh ,  Ken-Tsung Wong ,  Fu-Chuan Fang ,  Yuh-Yih Chien ,  Chung-Feng Wang ,  Ruei-Tang Chen ,  Teng-Chih Chao ,  You-Ming Chen

IPC: G03G5/06 ,  G03G5/047 ,  C07F7/02 ,  C07C13/48

CPC classification number: C07C13/567 ,  C07C13/72 ,  G03G5/047 ,  G03G5/0607

Abstract: A substituted oligofluorene for organic light-emitting diode (OLED) and organic photoconductor (OPC) has a chemical structure of: wherein X and Y are an integer of 0 or 1, G1 and G2 are independently of either CnH2n+1 or CnH2n+1O; and n is an integer of 0 to 16.

Abstract translation: 用于有机发光二极管（OLED）和有机光电导体（OPC）的取代的低聚芴具有以下化学结构：其中X和Y为0或1的整数，G 1和G 2， 2个独立于C n H 2n + 1或C n H 2n + 1 / O; n为0〜16的整数。

公开(公告)号：US07017201B2

公开(公告)日：2006-03-28

申请号：US10759368

申请日：2004-01-15

Applicant: Yu-Ting Lin

Inventor： Yu-Ting Lin

IPC: A47C13/38

CPC classification number: A47C17/62

Abstract: The present invention relates to a table structure that can be converted into bed or table according to user's needs. Wherein a base frame of the present invention is respectively provided with a bed having two L-shape side frames and a table having two side shelves. The two side shelves of the table are connected to the base frame through spiral arms, by virtue of the pivotal connection between the L-shape side frames and the side shelves, the bed can be positioned respectively in a horizontal manner or in a vertical manner. Through the spiral arms, the table can be lowered down or raised up relative to the bed, such that the device of the present invention can be converted into a bed or a table as desired.

Abstract translation: 本发明涉及一种可根据用户需要转换成床或桌的桌面结构。 其中，本发明的基架分别设有具有两个L形侧框架的台架和具有两个侧架的工作台。 桌子的两侧架子通过螺旋臂连接到基架上，由于L形侧框架和侧架之间的枢转连接，床可以分别以水平方式或垂直方式定位 。 通过螺旋臂，桌子可以相对于床下降或升高，使得本发明的装置可以根据需要被转换成床或桌子。

公开(公告)号：US20050170630A1

公开(公告)日：2005-08-04

申请号：US10768848

申请日：2004-01-29

Applicant: Yia-Liang Kuo ,  Yu-Chang Lin ,  Yu-Ting Lin

Inventor： Yia-Liang Kuo ,  Yu-Chang Lin ,  Yu-Ting Lin

IPC: H01L21/44 ,  H01L21/60 ,  H01L23/485

CPC classification number: H01L24/10 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05085 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2224/29099 ,  H01L2924/00 ,  H01L2224/05099

Abstract: Novel methods for reducing shear stress applied to solder bumps on a flip chip. The methods are particularly applicable to reducing temperature-induced shear stress on solder bumps located adjacent to an empty space on a flip chip during high-temperature testing of the chip. According to a first embodiment, the method includes providing an anchoring solder bump in each empty space on the flip chip. The anchoring solder bumps impart additional structural integrity to the flip chip and prevent shear-induced detachment of solder bumps from the flip chip, particularly those solder bumps located adjacent to each anchoring solder bump. According to a second embodiment, the method includes providing an anchoring solder bump in the empty space and then connecting the anchoring solder bump to an adjacent solder bump on the chip using a solder bridge.

Abstract translation: 用于减少施加到倒装芯片上的焊料凸块的剪切应力的新方法。 该方法特别适用于在芯片的高温测试期间减少与倒装芯片上的空白空间相邻的焊料凸块上的温度诱导剪切应力。 根据第一实施例，该方法包括在倒装芯片上的每个空白空间中提供锚定焊​​料凸块。 锚定焊料凸块对倒装芯片赋予额外的结构完整性，并防止焊料凸块从倒装芯片，特别是位于每个锚定焊料凸块附近的焊料凸块的剪切引起的分离。 根据第二实施例，该方法包括在空间中提供锚定焊​​料凸块，然后使用焊接桥将锚定焊料凸块连接到芯片上的相邻焊料凸块。

公开(公告)号：US20050110140A1

公开(公告)日：2005-05-26

申请号：US10718192

申请日：2003-11-20

Applicant: Yian-Liang Kuo ,  Yung-Sheng Huang ,  Yu-Ting Lin

Inventor： Yian-Liang Kuo ,  Yung-Sheng Huang ,  Yu-Ting Lin

IPC: H01L23/31 ,  H01L23/36 ,  H01L23/42 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L23/36 ,  H01L23/3128 ,  H01L23/42 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of forming a heat spreader ball grid array package, and the resultant heat spreader ball grid array package, comprising the following steps. A semiconductor chip affixed to a ball grid substrate is provided. The semiconductor chip over the ball grid substrate is encased with a molding compound. A heat spreader is mounted over the ball grid substrate and spaced apart from the molding compound to form a gap. Thermal grease is placed into the gap, at least between the heat spreader and the molding compound, to form the heat spreader ball grid array package. It is also possible to place thermal grease over the molding compound and then mounting the heat spreader over the ball grid substrate.

Abstract translation: 一种形成散热器球栅阵列封装的方法，以及所得的散热器球栅阵列封装，包括以下步骤。 提供固定在球栅基板上的半导体芯片。 球形栅极衬底上的半导体芯片被模制化合物封装。 散热器安装在球栅基板上并与模塑料间隔开以形成间隙。 至少在散热器和模塑料之间，将热油脂放置在间隙中，形成散热器球栅阵列封装。 还可以将热油脂放置在模制化合物上，然后将散热器安装在球栅基板上。