公开(公告)号：US20080299779A1

公开(公告)日：2008-12-04

申请号：US11754845

申请日：2007-05-29

Applicant: Gregory C. Smith

Inventor： Gregory C. Smith

IPC: H01L21/31

CPC classification number: H01L21/7682 ,  H01L21/76834

Abstract: Systems and methods for controlling the effective dielectric constant of materials used in a semiconductor device are shown and described. In one embodiment, a method comprises providing a semiconductor substrate with a plurality of pillars formed thereon, depositing a first layer of dielectric material over a plurality of pillars, removing a portion of the first layer deposited over the plurality of pillars, and depositing a second layer of dielectric material over the plurality of pillars, where the second layer leaves a plurality of voids between the plurality of pillars.

Abstract translation: 显示和描述了用于控制半导体器件中使用的材料的有效介电常数的系统和方法。 在一个实施例中，一种方法包括提供半导体衬底，其上形成有多个柱，在多个柱上沉积介电材料的第一层，去除沉积在多个柱上的第一层的一部分，以及沉积第二层 电介质材料层在多个柱上，其中第二层在多个柱之间留下多个空隙。

公开(公告)号：US07250620B2

公开(公告)日：2007-07-31

申请号：US11039170

申请日：2005-01-20

Applicant: Stefan Wurm ,  Vivek Bakshi

Inventor： Stefan Wurm ,  Vivek Bakshi

IPC: G03C5/00 ,  G03B27/42 ,  G03B27/54

CPC classification number: G02B5/208 ,  G03F7/70191 ,  G03F7/70575 ,  G03F7/70825 ,  G03F7/70908 ,  G03F7/70916 ,  G03F7/70958 ,  G21K1/10

Abstract: Filters for EUV lithography, methods of manufacture thereof, and methods of filtering in an EUV lithography system are disclosed. The filter comprises a nanotube material layer sandwiched by two thin material layers that are highly transmissive and provide structural support for the nanotube material layer. The filter is supported on at least one side by a patterned structural support. The filter mitigates debris, provides spectral purity filtering, or both.

Abstract translation: 公开了用于EUV光刻的滤光器，其制造方法以及EUV光刻系统中的滤光方法。 该滤波器包括被两个薄的材料层夹在中间的纳米管材料层，这些薄层材料是高透射性的并为纳米管材料层提供结构支撑。 过滤器通过图案化结构支撑件至少在一侧支撑。 过滤器减轻碎片，提供光谱纯度过滤或两者。

公开(公告)号：US20070063296A1

公开(公告)日：2007-03-22

申请号：US11233356

申请日：2005-09-22

Applicant: Kisik Choi ,  Husam Alshareef ,  Prashant Majhi

Inventor： Kisik Choi ,  Husam Alshareef ,  Prashant Majhi

IPC: H01L29/94

CPC classification number: H01L21/823842

Abstract: Methods for fabricating two metal gate stacks with varying work functions for complementary metal oxide semiconductor (CMOS) devices are provided A first metal layer may be deposited onto a gate dielectric, followed by the deposition of a second metal layer, where the second metal layer modulated the work function of the first metal layer. The second metal layer and subsequently etch, exposing a portion of the first metal layer. A third metal layer may be deposited on the etched second metal layer and the exposed first metal layer, where the third metal layer may modulate the work function of the exposed first metal layer. Subsequent fabrication techniques were used to define the gate stack.

Abstract translation: 提供了用于制造用于互补金属氧化物半导体（CMOS）器件的具有不同功函数的两个金属栅极叠层的方法。第一金属层可沉积在栅极电介质上，随后沉积第二金属层，其中第二金属层调制 第一金属层的功函数。 第二金属层并随后蚀刻，暴露第一金属层的一部分。 可以在蚀刻的第二金属层和暴露的第一金属层上沉积第三金属层，其中第三金属层可以调节暴露的第一金属层的功函数。 使用随后的制造技术来定义栅极堆叠。

公开(公告)号：US20060213615A1

公开(公告)日：2006-09-28

申请号：US11305312

申请日：2005-12-16

Applicant: Abbas Rastegar

Inventor： Abbas Rastegar

IPC: H01L21/306

CPC classification number: H01L21/67028 ,  B08B7/0042 ,  H01L21/67051

Abstract: An apparatus including a laser operating in different cleaning techniques is provided. In one embodiment, the laser interacts with the particle to remove the particle by expansion. In another embodiment, a liquid-assisted laser cleaning technique evaporates a liquid layer on the surface by laser pulses and subsequently removing the particles from the surface. Further, the present disclosure provides parameters to control the energy transfer to the particle. For example, for a shock wave generation parameters, the droplets size and concentration (e.g., pressure), substrate surface temperature, chemical composition of the droplets may be controlled.

Abstract translation: 提供一种包括以不同清洁技术操作的激光器的设备。 在一个实施方案中，激光与颗粒相互作用以通过扩展除去颗粒。 在另一个实施例中，液体辅助激光清洗技术通过激光脉冲蒸发表面上的液体层，随后从表面除去颗粒。 此外，本公开提供了控制到颗粒的能量传递的参数。 例如，对于冲击波产生参数，可以控制液滴尺寸和浓度（例如压力），底物表面温度，液滴的化学组成。

公开(公告)号：US20050214655A1

公开(公告)日：2005-09-29

申请号：US11015590

申请日：2004-12-17

Applicant: Paul Zimmerman ,  Chris K. Peski

Inventor： Paul Zimmerman ,  Chris K. Peski

IPC: A47G1/12 ,  B44F1/00 ,  G03F1/14 ,  G03F9/00

CPC classification number: G03F1/62 ,  H01J2237/3165 ,  Y10T428/31544

Abstract: The present invention relates generally to the fields of semiconductor lithography. More particularly, it concerns methods, compositions, and apparatuses relating to 157 nm and 193 nm soft pellicles and the use of perfluorinated polymers in the creation of pellicles.

Abstract translation: 本发明一般涉及半导体光刻领域。 更具体地，涉及与157nm和193nm软膜相关的方法，组合物和装置以及全氟化聚合物在产生薄膜中的用途。

公开(公告)号：US6100184A

公开(公告)日：2000-08-08

申请号：US914995

申请日：1997-08-20

Applicant: Bin Zhao ,  Prahalad K. Vasudev ,  Ronald S. Horwath ,  Thomas E. Seidel ,  Peter M. Zeitzoff

Inventor： Bin Zhao ,  Prahalad K. Vasudev ,  Ronald S. Horwath ,  Thomas E. Seidel ,  Peter M. Zeitzoff

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L21/4763

CPC classification number: H01L21/76849 ,  H01L21/7681 ,  H01L21/76843 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  Y10S438/902

Abstract: A technique for fabricating a dual damascene interconnect structure using a low dielectric constant material as a dielectric layer or layers. A low dielectric constant (low-.di-elect cons.) dielectric material is used to form an inter-level dielectric (ILD) layer between metallization layers and in which via and trench openings are formed in the low-.di-elect cons. ILD. The dual damascene technique allows for both the via and trench openings to be filled at the same time.

Abstract translation: 一种使用低介电常数材料作为电介质层或多层制造双镶嵌互连结构的技术。 低介电常数（低+ 531）介电材料用于在金属化层之间形成层间电介质层（ILD）层，其中通孔和沟槽开口形成在低+ 531 ILD中。 双镶嵌技术允许通孔和沟槽开口同时被填充。

公开(公告)号：US5674787A

公开(公告)日：1997-10-07

申请号：US587263

申请日：1996-01-16

Applicant: Bin Zhao ,  Prahalad K. Vasudev ,  Valery M. Dubin ,  Yosef Shacham-Diamand ,  Chiu H. Ting

Inventor： Bin Zhao ,  Prahalad K. Vasudev ,  Valery M. Dubin ,  Yosef Shacham-Diamand ,  Chiu H. Ting

IPC: H01L21/288 ,  H01L21/768 ,  H01L21/28

CPC classification number: H01L21/76831 ,  H01L21/288 ,  H01L21/76849 ,  H01L21/76874 ,  H01L21/76879 ,  Y10S977/81

Abstract: A method or utilizing electroless copper deposition to selectively form encapsulated copper plugs to connect conductive regions on a semiconductor. A via opening in an inter-level dielectric (ILD) provides a path for connecting two conductive regions separated by the ILD. Once the underlying metal layer is exposed by the via opening, a SiN or SiON dielectric encapsulation layer is formed along the sidewalls of the via. Then, a contact displacement technique is used to form a thin activation layer of copper on a barrier metal, such as TiN, which is present as a covering layer on the underlying metal layer. After the contact displacement of copper on the barrier layer at the bottom of the via, an electroless copper deposition technique is then used to auto-catalytically deposit copper in the via. The electroless copper deposition continues until the via is almost filled, but leaving sufficient room at the top in order to form an upper encapsulation layer. The SiN or SiON sidewalls, the bottom barrier layer and the cap barrier layer function to fully encapsulate the copper plug in the via. The plug is then annealed.

Abstract translation: 一种方法或利用无电镀铜沉积来选择性地形成封装的铜塞以连接半导体上的导电区域。 层间电介质（ILD）中的通孔开口提供用于连接由ILD分离的两个导电区域的路径。 一旦底层金属层被通孔开口暴露，沿通孔的侧壁形成SiN或SiON电介质封装层。 然后，使用接触位移技术在阻挡金属上形成薄的铜活化层，例如在下面的金属层上作为覆盖层存在的TiN。 在通孔底部的阻挡层上的铜的接触位移之后，然后使用无电解铜沉积技术自动催化将铜沉积在通孔中。 无电铜沉积继续直到通孔几乎被填充，但是在顶部留下足够的空间以形成上封装层。 SiN或SiON侧壁，底部阻挡层和帽阻挡层用于将铜塞完全封装在通孔中。 然后将塞子退火。

公开(公告)号：US5660706A

公开(公告)日：1997-08-26

申请号：US688466

申请日：1996-07-30

Applicant: Bin Zhao ,  Prahalad K. Vasudev

Inventor： Bin Zhao ,  Prahalad K. Vasudev

IPC: C23C18/16 ,  H01L21/288 ,  H01L21/768 ,  C25D5/02 ,  C25D5/04 ,  C25D7/12 ,  C25D17/00

CPC classification number: H01L21/76831 ,  C23C18/1607 ,  C23C18/1651 ,  C23C18/1653 ,  C23C18/1669 ,  C23C18/1671 ,  H01L21/2885 ,  H01L21/76805 ,  H01L21/76843 ,  H01L21/76874 ,  H01L21/76879

Abstract: A technique for utilizing an electric field to initiate electroless deposition of a material to form layers and/or structures on a semiconductor wafer. The wafer is disposed between a positive electrode and a negative electrode and disposed so that its deposition surface faces the positive electrode. A conductive surface on the wafer is then subjected to an electroless copper deposition solution. When copper is the conductive material being deposited, positive copper ions in the solution are repelled by the positive electrode and attracted by the negatively charged wafer surface. Once physical contact is made, the copper ions dissipate their charges by accepting electrons from the conductive surface, thereby forming copper atoms on the surface. The deposited copper have the catalytic properties so that when a reductant in the solution is absorbed at the copper sites and then oxidized, additional electrons are released into the conductive surface. The formation of the initial layer of copper functions as a seed layer for further electroless growth of copper. The same electroless deposition solution can be used for both the initial activation layer and the additional autocatalytic growth on to the seed layer.

Abstract translation: 一种利用电场来引发化学沉积材料以在半导体晶片上形成层和/或结构的技术。 晶片设置在正电极和负电极之间并且被设置为使得其沉积表面面向正电极。 然后将晶片上的导电表面经受化学镀铜沉积溶液。 当铜是导电材料沉积时，溶液中的正铜离子被正极排斥并被带负电的晶片表面吸引。 一旦进行物理接触，铜离子通过从导电表面接受电子而耗散它们的电荷，从而在表面上形成铜原子。 沉积的铜具有催化性能，使得当溶液中的还原剂在铜位置被吸收然后被氧化时，附加的电子被释放到导电表面中。 铜的初始层的形成用作用于铜的进一步无电生长的种子层。 相同的无电沉积溶液可以用于初始活化层和在种子层上的额外的自催化生长。

公开(公告)号：US5480747A

公开(公告)日：1996-01-02

申请号：US342939

申请日：1994-11-21

Applicant: Prahalad K. Vasudev

Inventor： Prahalad K. Vasudev

IPC: G03F1/29 ,  G03F1/32 ,  G03F9/00

CPC classification number: G03F1/29 ,  G03F1/32

Abstract: An attenuated phase shifting mask has absorbers embedded (buried) in the mask substrate, instead of on the surface of the substrate. The buried absorbers allow for controlling attenuation and phase shifting parameters. The material composition and the thickness of the absorber regions determine the amount of attenuation that is to be achieved, as well as phase shifting in some instances. In other instances, offset distances of the absorbers from the surface of the mask control the phase shift. Light scattering and diffraction is reduced or eliminated by having the absorbers below the surface of the mask. By reducing light scattering and distortion, the mask of the present invention allows for PSM lithography techniques to be extended to ranges of shorter wavelength.

Abstract translation: 衰减的相移掩模具有嵌入（掩埋）在掩模衬底中的吸收体，而不是在衬底的表面上。 埋地吸收器允许控制衰减和相移参数。 吸收器区域的材料组成和厚度决定了在某些情况下要实现的衰减量以及相移。 在其他情况下，吸收器与掩模表面的偏移距离控制相移。 通过使吸收剂在掩模的表面下方减少或消除光散射和衍射。 通过减少光散射和变形，本发明的掩模允许将PSM光刻技术扩展到较短波长的范围。

公开(公告)号：US5466991A

公开(公告)日：1995-11-14

申请号：US340140

申请日：1994-11-15

Applicant: Lee A. Berry

Inventor： Lee A. Berry

IPC: H01J37/32 ,  H01J7/24

CPC classification number: H01J37/32238 ,  H01J37/32192 ,  H01J37/32266 ,  H01J37/32623 ,  H01J37/32678 ,  F16B2012/2018 ,  F16B2012/2045

Abstract: The present invention describes a technique to control the radial profile of microwave power in an ECR plasma discharge. In order to provide for a uniform plasma density to a specimen, uniform energy absorption by the plasma is desired. By controlling the radial profile of the microwave power transmitted through the microwave window of a reactor, the profile of the transmitted energy to the plasma can be controlled in order to have uniform energy absorption by the plasma. An advantage of controlling the profile using the window transmission characteristics is that variations to the radial profile of microwave power can be made without changing the microwave coupler or reactor design.

Abstract translation: 本发明描述了在ECR等离子体放电中控制微波功率的径向分布的技术。 为了为样品提供均匀的等离子体密度，需要等离子体的均匀的能量吸收。 通过控制通过反应器的微波窗口传递的微波功率的径向分布，可以控制向等离子体传输的能量的分布，以便等离子体具有均匀的能量吸收。 使用窗口传输特性来控制轮廓的优点是可以在不改变微波耦合器或反应器设计的情况下对微波功率的径向轮廓进行变化。