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公开(公告)号：US20230387876A1
公开(公告)日：2023-11-30
申请号：US18324683
申请日：2023-05-26
Applicant: Qorvo US, Inc.
Inventor： Nadim Khlat , Michael R. Kay , James M. Retz
CPC classification number: H03G5/165 , H03F3/45475 , H03F1/0233 , H03F2200/451 , H03F2200/105 , H03G2201/103
Abstract: Equalizer circuitry includes a differential target voltage input, an equalizer output, a first operational amplifier, and a second operational amplifier. The differential target voltage input includes a target voltage input node and an inverted target voltage input node. The first operational amplifier and the second operational amplifier are coupled in series between the differential target voltage input and the equalizer output. The first operational amplifier is configured to receive a target voltage signal and provide an intermediate signal based on the target voltage input signal. The second operational amplifier is configured to receive the intermediate signal and an inverted target voltage signal and provide an output signal to the equalizer output. The first operational amplifier and the second operational amplifier are interconnected with one or more passive components such that a transfer function between the differential target voltage input and the equalizer output is a second-order complex-zero function.
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公开(公告)号：US11804814B1
公开(公告)日：2023-10-31
申请号：US17719613
申请日：2022-04-13
Applicant: STMicroelectronics S.r.l.
Inventor： Francesco Stilgenbauer , Paolo Cacciagrano , Giovanni Gonano
CPC classification number: H03G3/344 , H04R3/00 , H03G2201/103 , H04R2430/01
Abstract: A digital audio playback circuit includes a noise shaping circuit configured to receive an input digital audio signal, and a digital to analog converter (DAC) configured to convert the input digital audio signal to a pre-amplified output analog audio signal according to a gain ramp defined by a gain control signal. A muting circuit is configured to compare input digital audio signal to a threshold and assert a mute control signal when the input digital audio signal is below the threshold. An analog gain control ramp circuit is configured to generate the gain control signal in response to the mute control signal to cause the gain ramp to ramp down. An amplifier is configured to amplify the pre-amplified output analog audio signal for playback by an audio playback device.
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公开(公告)号：US20230344392A1
公开(公告)日：2023-10-26
申请号：US17726653
申请日：2022-04-22
Applicant: Qorvo US, Inc.
Inventor： Baker Scott , Padmmasini Desikan , George Maxim , Mihai Murgulescu
CPC classification number: H03F3/19 , H03F1/565 , H03G3/3036 , H03F2200/294 , H03F2200/451 , H03F2200/387 , H03G2201/103 , H03G2201/307
Abstract: Disclosed is a low noise amplifier system. Included is a main amplifier having a main input coupled to a RF input and a main output connected to an RF output and an impedance amplifier having an impedance input coupled to the RF input and an impedance output coupled to the RF output, wherein the impedance amplifier is configured to provide input impedance matching to the main amplifier. The impedance amplifier also provides a first noise path that passes through the impedance amplifier such that the noise generated by the impedance amplifier is substantially out of phase with the noise that passes through a second noise path that passes through the main amplifier. A neutralization amplifier is configured to reduce parasitic capacitive loading within the first noise path.
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公开(公告)号：US11791785B2
公开(公告)日：2023-10-17
申请号：US17128537
申请日：2020-12-21
Applicant: IMEC vzw
Inventor： Khaled Khalaf , Steven Brebels
CPC classification number: H03F3/45183 , H03G3/3036 , H03F2200/451 , H03G2201/103 , H03G2201/307
Abstract: A sign switching circuitry is disclosed. In one aspect, the sign switching circuitry includes a first and second differential common-source amplifier having common differential input nodes and common differential output nodes configured such that a differential input signal applied at the common differential input nodes is amplified to a differential output signal at the common differential output nodes with a fixed gain by the first amplifier and by the fixed gain with opposite sign by the second amplifier. The sign switching circuitry also includes a switching circuitry configured to activate the first common-source amplifier and deactivate the second common-source amplifier to amplify the differential input signal by the fixed gain, and to activate the second common-source amplifier and deactivate the first common-source amplifier to amplify the differential input signal by the fixed gain with opposite sign.
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公开(公告)号：US20230327651A1
公开(公告)日：2023-10-12
申请号：US18203810
申请日：2023-05-31
Applicant: Reach Power, Inc.
Inventor： Asmita Dani , Christopher Joseph Davlantes
CPC classification number: H03K3/012 , H03F3/19 , H02M7/217 , H03G3/3036 , H03G2201/307 , H03F2200/451 , H03G2201/103
Abstract: A bidirectional RF circuit, preferably including a plurality of terminals, a switch, a transistor, a coupler, and a feedback network. The circuit can optionally include a drain matching network, an input matching network, and/or one or more tuning inputs. In some variations, the circuit can optionally include one or more impedance networks, such as an impedance network used in place of the feedback network; in some such variations, the circuit may not include a coupler, switch, and/or input matching network. A method for circuit operation, preferably including operating in an amplifier mode, operating in a rectifier mode, and/or transitioning between operation modes.
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Patent Agency Ranking
公开(公告)号：US11777463B2
公开(公告)日：2023-10-03
申请号：US17349393
申请日：2021-06-16
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Sudarshan Udayashankar , Viola Schaffer
CPC classification number: H03G3/30 , H03F3/04 , H03F3/45 , H03F2200/261 , H03G2201/103
Abstract: A system includes an instrumentation amplifier (INA) including a first transistor coupled to a first input node, and a second transistor coupled to a second input node. The INA also includes a resistor coupled between the first transistor and the second transistor. The INA includes a gain resistor network coupled to the resistor and to the first and second transistors, where the gain resistor network includes two or more gain resistors. The system also includes a voltage to current converter, where the voltage to current converter is coupled to the resistor and the gain resistor network.
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公开(公告)号：US11750165B2
公开(公告)日：2023-09-05
申请号：US17547553
申请日：2021-12-10
Applicant: LG DISPLAY CO., LTD.
Inventor： JunSeok Oh , MinHo Sohn
CPC classification number: H03G3/3036 , H04R1/028 , H04R3/00 , H04R17/00 , H04R29/001 , G01K2217/00 , H03G2201/103 , H04R2430/01 , H04R2499/15
Abstract: A vibration generating apparatus comprises a vibration apparatus and a vibration driving circuit including a driving signal generator configured to supply a driving signal to the vibration apparatus, wherein the driving signal generator is configured to adjust a frequency-based gain compensation value based on at least one of a circuit internal temperature value of the vibration driving circuit and a temperature prediction value of the vibration apparatus corresponding to a current value of an nth driving signal, compensate for a frequency-based gain value based on the adjusted frequency-based gain compensation value, compensate for an (n+1)th driving signal based on the compensated frequency-based gain value, and supply the compensated (n+1)th driving signal to the vibration apparatus.
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公开(公告)号：US20230268899A1
公开(公告)日：2023-08-24
申请号：US17674976
申请日：2022-02-18
Applicant: Realtek Semiconductor Corp.
Inventor： Chia-Liang (Leon) Lin
CPC classification number: H03G3/30 , H03F3/16 , H03G2201/103
Abstract: A programmable gain amplifier includes a programmable resistor ladder deployed across Nmax junction nodes and controlled by Nmax−1 resistor control signals, where Nmax is an integer greater than one; a common-gate cascode amplifier multiplexer comprising Nmax common-gate cascode amplifiers configured to receive Nmax internal voltages at the Nmax junction nodes and output Nmax output currents in accordance with Nmax amplifier control signals, respectively, to an output node that is loaded with a load; and an AC (alternate current) coupling capacitor configured to couple an input node to the first junction node.
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公开(公告)号：US20230249500A1
公开(公告)日：2023-08-10
申请号：US18003069
申请日：2020-06-30
Applicant: Sensata Technologies, Inc.
Inventor： Gary Smith
CPC classification number: B60C23/045 , H03G3/30 , B60C23/0461 , H03G2201/103
Abstract: The present disclosure relates to a system and method for a tire pressure monitoring system. Embodiments may include a first amplifier associated with a plurality of amplifiers that is configured to receive a signal. The plurality of amplifiers may be configured to generate a first output, wherein generating includes filtering the signal and increasing an amplitude of the signal. A fixed threshold comparator may be configured to receive the first output and to generate a second output, based upon, at least in part, the first output, wherein the second output has the same frequency as the signal. Automatic gain control logic may be configured to receive the second output and determine a number of cycles in a given time period, the automatic gain control logic may be further configured to determine whether a revision to a setting of the automatic gain control logic is necessary.
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公开(公告)号：US20230247316A1
公开(公告)日：2023-08-03
申请号：US18003417
申请日：2021-06-28
Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Inventor： TERUKAZU TANAKA , ATSUMI NIWA
IPC: H04N25/57 , H03G3/30 , H04N25/778 , H04N25/51
CPC classification number: H04N25/57 , H03G3/30 , H04N25/778 , H04N25/51 , H03G2201/103
Abstract: A solid-state imaging device according to an embodiment includes: pixel circuits, each of the pixel circuits including: a generation unit (31) generating a voltage corresponding to a logarithmic value of a photocurrent; a capacitor (C1) having a first electrode to which the voltage generated by the generation unit is applied; a first amplifier (40a) having a first input terminal, which is connected to a second electrode of the capacitor, and a second input terminal, to which a first reference voltage (VbA0) is applied to, to output a comparison result obtained by comparing the voltage applied to the first input terminal with the voltage applied to the second input terminal; a switch unit (43) controlling a connection between the output of the first amplifier and the first input terminal; and a second amplifier (40b) having a third input terminal, to which the output of the first amplifier is connected, and a fourth input terminal, to which a second reference voltage (VbA1) is applied, to output a comparison result obtained by comparing the voltage applied to the third input terminal with the voltage applied to the fourth input terminal, in which a first gain of the first amplifier is lower than a second gain of the second amplifier.
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