公开(公告)号：US07626335B2

公开(公告)日：2009-12-01

申请号：US11369741

申请日：2006-03-08

Applicant: Chung Hoo Park ,  Jung Woo Ok ,  Ho Jun Lee

Inventor： Chung Hoo Park ,  Jung Woo Ok ,  Ho Jun Lee

IPC: H01J17/49

CPC classification number: H01J11/38 ,  H01J11/12 ,  H01J11/24 ,  H01J2211/245

Abstract: The plasma display apparatus includes a first electrode and a second electrode formed on an upper substrate, and a barrier rib. The second electrode is arranged in parallel with the first electrode. The barrier rib is formed on a lower substrate opposite to the upper substrate to divide a discharge space. The first electrode and the second electrode are respectively protruded toward the discharge space to have a predetermined thickness. A discharge occurs between the first electrode and the second electrodes opposite to the first electrode. Since the margin of static characteristics increases, the voltage range in which stable driving is possible increase and the amount of the consumption of the discharge current decreases, to thereby reducing power consumption, and enhancing the luminous efficiency and the efficiency of the plasma discharge.

Abstract translation: 等离子体显示装置包括形成在上基板上的第一电极和第二电极以及隔壁。 第二电极与第一电极平行布置。 阻挡肋形成在与上基板相对的下基板上以分隔放电空间。 第一电极和第二电极分别朝向放电空间突出以具有预定厚度。 在与第一电极相对的第一电极和第二电极之间发生放电。 由于静电特性的余量增加，所以可以提高稳定驱动的电压范围，并且放电电流的消耗量减少，从而降低功耗，提高发光效率和提高等离子体放电的效率。

公开(公告)号：US20090261420A1

公开(公告)日：2009-10-22

申请号：US12332877

申请日：2008-12-11

Applicant: Ho-In Ryu ,  Bong-Su Kim ,  Dae-Ik Kim ,  Ho-Jun Lee ,  Dae-Young Jang ,  Si-Hyung Lee

Inventor： Ho-In Ryu ,  Bong-Su Kim ,  Dae-Ik Kim ,  Ho-Jun Lee ,  Dae-Young Jang ,  Si-Hyung Lee

IPC: H01L25/00 ,  H01L21/4763 ,  H01L29/78

CPC classification number: H01L29/4236 ,  H01L29/66621

Abstract: A method of forming a semiconductor device is provided, comprising forming a plurality of hard masks on a substrate by patterning an insulating layer; forming a plurality of trenches in the substrate, each trench having trench walls disposed between two adjacent masks and extending vertically from a bottom portion to an upper portion; forming an insulating layer on the hard masks and the trench walls; forming a conductive layer on the insulating layer; etching the conductive layer to form conductive layer patterns to fill the bottom portions of the trenches; depositing a buffer layer on the conductive layer patterns and the trench walls; and filling the upper portions of the trenches with a capping layer.

Abstract translation: 提供一种形成半导体器件的方法，包括：通过图案化绝缘层在衬底上形成多个硬掩模; 在衬底中形成多个沟槽，每个沟槽具有设置在两个相邻掩模之间并且从底部到上部垂直延伸的沟槽壁; 在硬掩模和沟槽壁上形成绝缘层; 在绝缘层上形成导电层; 蚀刻导电层以形成导电层图案以填充沟槽的底部; 在导电层图案和沟槽壁上沉积缓冲层; 以及用覆盖层填充沟槽的上部。

公开(公告)号：US20090111250A1

公开(公告)日：2009-04-30

申请号：US12177917

申请日：2008-07-23

Applicant: Ho-Jun LEE ,  Yong-Jin KIM ,  Dong-Kun LEE ,  Doo-Soo KIM ,  Ji-Hoon KIM

Inventor： Ho-Jun LEE ,  Yong-Jin KIM ,  Dong-Kun LEE ,  Doo-Soo KIM ,  Ji-Hoon KIM

IPC: H01L21/20

CPC classification number: H01L21/0254 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/02664

Abstract: Provided is a method for preparing a compound semiconductor substrate. The method includes coating a plurality of spherical balls on a substrate, growing a compound semiconductor epitaxial layer on the substrate coated with the spherical balls while allowing voids to be formed under the spherical balls, and cooling the substrate on which the compound semiconductor epitaxial layer is grown so that the substrate and the compound semiconductor epitaxial layer are self-separated along the voids. The spherical ball treatment can reduce dislocation generations. In addition, because the substrate and the compound semiconductor epitaxial layer are separated through the self-separation, there is no need for laser lift-off process.

Abstract translation: 提供了一种制备化合物半导体衬底的方法。 该方法包括在基板上涂覆多个球形球，在涂覆有球形球的基材上生长化合物半导体外延层，同时允许在球形球下方形成空隙，并且冷却其上化合物半导体外延层为 生长，使得衬底和化合物半导体外延层沿着空隙自我分离。 球形球处理可以减少错位几代。 此外，由于基板和化合物半导体外延层通过自分离分离，因此不需要激光剥离处理。

公开(公告)号：US20090002613A1

公开(公告)日：2009-01-01

申请号：US12087739

申请日：2006-11-15

Applicant: Hee-Jung Kim ,  Dong-Ryul Kim ,  Ho-Jun Lee ,  Sang-Uk Ryu ,  Hyo-Sun Lee ,  Boong-Goon Jeong ,  Dae-Woo Nam ,  Ju-Eun Cha

Inventor： Hee-Jung Kim ,  Dong-Ryul Kim ,  Ho-Jun Lee ,  Sang-Uk Ryu ,  Hyo-Sun Lee ,  Boong-Goon Jeong ,  Dae-Woo Nam ,  Ju-Eun Cha

IPC: G02F1/13363 ,  B29D11/00

CPC classification number: G02F1/1333 ,  G02B1/04 ,  G02B5/3083 ,  G02F1/133634 ,  Y10T428/10 ,  Y10T428/1036 ,  Y10T428/105 ,  Y10T428/31786 ,  C08L81/00

Abstract: Disclosed is a negative C-type retardation compensator for a liquid crystal display. The negative C-type retardation compensator for the liquid crystal display includes polyarylate having a thio group or a sulfur oxide group in a polymer main chain thereof. Accordingly, the retardation compensator has an absolute value of negative retardation that is larger in a thickness direction than a retardation compensator which includes polyarylate having no thio group or sulfur oxide group in a polymer main chain thereof even though the retardation compensator having the thio group or sulfur oxide group and the retardation compensator having no thio group or sulfur oxide group are the same as each other in thickness. Thereby, the negative C-type retardation compensator for liquid crystal displays is capable of being desirably applied to the liquid crystal displays.

Abstract translation: 公开了用于液晶显示器的负C型延迟补偿器。 用于液晶显示器的负C型延迟补偿器包括其聚合物主链中具有硫基或硫氧化物基团的多芳基化合物。 因此，延迟补偿器具有在包含聚合物主链中不含硫基或硫氧化物基团的多芳基化物的延迟补偿器的厚度方向上的负相位差绝对值即使具有硫基的相位差补偿器或 硫氧化物基团和没有硫基或硫氧化物基团的延迟补偿器的厚度彼此相同。 由此，液晶显示器的负C型延迟补偿器能够适用于液晶显示器。

公开(公告)号：US06997040B1

公开(公告)日：2006-02-14

申请号：US10110209

申请日：2000-10-17

Applicant: Won-Bae Lee ,  Ho-Jun Lee

Inventor： Won-Bae Lee ,  Ho-Jun Lee

IPC: G01N7/00

CPC classification number: G01N27/12

Abstract: A gas sensor includes a silicon substrate provided with a recess, an insulating layer, a first and a second conductive patterned layers and a detecting portion for sensing a gas which passes there through. In the gas sensor, the insulating layer is formed on a top portion of the silicon substrate which does not form the recess. The first and the second conductive patterned layers extend over the recess, thereby being apart from the silicon substrate physically. The detecting portion is formed on both portions of the first and the second conductive patterned layers.

Abstract translation: 气体传感器包括设置有凹部的硅衬底，绝缘层，第一和第二导电图案化层以及用于感测通过其的气体的检测部分。 在气体传感器中，绝缘层形成在硅基板的不形成凹部的顶部上。 第一和第二导电图案层在凹部上延伸，从而物理上与硅衬底分开。 检测部分形成在第一和第二导电图案化层的两个部分上。

公开(公告)号：US06844108B1

公开(公告)日：2005-01-18

申请号：US09744951

申请日：1999-08-05

Applicant: Won-Bae Lee ,  Han Chung ,  Ho-Jun Lee

Inventor： Won-Bae Lee ,  Han Chung ,  Ho-Jun Lee

IPC: H01M4/02 ,  H01M6/12 ,  H01M6/38 ,  H01M6/30

CPC classification number: H01M6/38 ,  H01M6/12

Abstract: To compliment the drawback of the conventional large-size reserve battery cell inapplicable to a small electronic system, disclosed is a super-slim reserve battery cell sized merely several millimeters in its entirety including micro-size battery elements sized about several μm by using a micro-machining technology of processing mechanical structures in a super-slim size. The present invention realized electrolyte container and other battery elements by using materials such as silicon, nickel, copper, aluminum, etc. to form a membrane structure of relatively thinner thickness than the periphery in an electrolyte container contiguous with the battery cell that is broken only when activating the cell. Therefore, it is possible to activate the battery cell with less power while securing sufficient impact-resistant characteristics under normal circumstances.

Abstract translation: 为了补充不适用于小型电子系统的常规大型储备电池的缺点，公开了一种超薄型储备电池，其整体尺寸仅为几毫米，包括通过使用微型尺寸的大小几毫米的微尺寸电池元件 以超薄的尺寸加工机械结构的加工技术。 本发明通过使用诸如硅，镍，铜，铝等的材料来实现电解液容器和其它电池元件，从而在仅与断电的电池单元相邻的电解质容器中形成比周边更薄的膜结构 激活细胞时。 因此，能够在一般情况下确保足够的抗冲击特性的同时，以较少的功率来激活电池单元。

公开(公告)号：US5828114A

公开(公告)日：1998-10-27

申请号：US807825

申请日：1997-02-27

Applicant: Choong Ki Kim ,  Chul Hi Han ,  Ho Jun Lee

Inventor： Choong Ki Kim ,  Chul Hi Han ,  Ho Jun Lee

IPC: H01L21/22 ,  B81B1/00 ,  B81C99/00 ,  H01L21/02 ,  H01L21/265 ,  H01L21/266 ,  H01L21/322 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113

CPC classification number: H01L21/26513 ,  H01L21/266 ,  Y10S438/938

Abstract: There are disclosed methods for the prevention of misfit dislocation in a silicon wafer and the silicon wafer structure manufactured thereby. A method according to an embodiment comprises the steps of: depositing a blanket silicon oxide or silicon nitride on silicon wafer in a chemical vapor deposition process; selectively etching the silicon oxide or silicon nitride, to form a silicon oxide or silicon nitride pattern which is of close shape; and injecting the silicon wafer with impurities at a high density with the CVD silicon oxide or silicon nitride pattern serving as a mask, so as to form an impurity-blocked region is formed under the CVD silicon oxide or silicon nitride through the action of the mask. The misfit dislocation is propagated mainly from the edge of wafer and an impurity-blocked region can prevent the propagation. The propagation energy is virtually based on the tensile stress attributable to the implantation of impurity. Formation of an impurity-blocked region in the wafer barricades the propagation of misfit dislocation because the propagation energy is not supplied in this region. Thus, the area of the silicon wafer enclosed by the impurity-blocked region has no misfit dislocation. By such conception, a silicon wafer free of misfit dislocation can be manufactured. Therefore, there are improved in electrical and mechanical properties in electrical devices, X-ray masks and micromachines as well as in surface roughness.

Abstract translation: 公开了防止硅晶片中的错配位错的方法以及由此制造的硅晶片结构。 根据实施例的方法包括以下步骤：在化学气相沉积工艺中在硅晶片上沉积覆盖氧化硅或氮化硅; 选择性地蚀刻氧化硅或氮化硅，以形成接近形状的氧化硅或氮化硅图案; 并且以CVD硅氧化物或氮化硅图案为掩模以高密度注入硅晶片以形成杂质阻挡区域，通过掩模的作用形成在CVD二氧化硅或氮化硅的下面 。 错配位错主要从晶片的边缘传播，杂质阻挡区域可以防止传播。 传播能量实际上基于归因于杂质注入的拉伸应力。 由于在该区域不提供传播能量，所以晶片中杂质阻挡区域的形成阻碍了错配位错的传播。 因此，由杂质阻挡区域包围的硅晶片的面积没有失配位错。 通过这样的概念，可以制造没有失配位错的硅晶片。 因此，电气设备，X射线掩模和微机械以及表面粗糙度的电气和机械性能都有所提高。

公开(公告)号：US5733433A

公开(公告)日：1998-03-31

申请号：US475536

申请日：1995-06-07

Applicant: Ho Jun Lee ,  Hi Deok Lee ,  Jae Duk Lee ,  Jun Bo Yoon ,  Ki Ho Han ,  Jae Kwan Kim ,  Chul Hi Han ,  Choong Ki Kim ,  Doo Won Seo

Inventor： Ho Jun Lee ,  Hi Deok Lee ,  Jae Duk Lee ,  Jun Bo Yoon ,  Ki Ho Han ,  Jae Kwan Kim ,  Chul Hi Han ,  Choong Ki Kim ,  Doo Won Seo

IPC: B41J2/05 ,  B41J2/14 ,  B41J2/16 ,  C25F3/14 ,  C25F3/16

CPC classification number: B41J2/14129 ,  B41J2/1603 ,  B41J2/1626 ,  B41J2/1632 ,  B41J2/1639 ,  B41J2/1642 ,  B41J2/1643 ,  B41J2/1646 ,  B41J2202/13

Abstract: A heat generating type ink-jet print head including an ink supply passage for receiving an ink from an ink container, a micro chamber for storing the ink and nozzles, all being directly formed on a substrate, and a method for fabricating the ink-jet print head using an electrolytic polishing process, and a method for fabricating the ink-jet print head. The ink-jet print head is fabricated using an electrolytic polishing process, thereby achieving an accurate and inexpensive fabrication.

公开(公告)号：US09213201B2

公开(公告)日：2015-12-15

申请号：US13157374

申请日：2011-06-10

Applicant: Young-Min Jung ,  Sang-Yeoul Lim ,  Kweon-Sam Hong ,  Hong-Joon Moon ,  You-Hyun Jeong ,  Sang-Ho Kim ,  Ho-Jun Lee

Inventor： Young-Min Jung ,  Sang-Yeoul Lim ,  Kweon-Sam Hong ,  Hong-Joon Moon ,  You-Hyun Jeong ,  Sang-Ho Kim ,  Ho-Jun Lee

IPC: G02F1/1339 ,  G02F1/1337 ,  G02F1/1341

CPC classification number: G02F1/133723 ,  G02F1/1337 ,  G02F1/1339 ,  G02F1/1341 ,  G02F2001/13415

Abstract: In a display panel and a method of manufacturing the same, the display panel includes a first display substrate, a second display substrate and a sealing member. The first display substrate includes a first alignment layer in a first display region and a first peripheral region of a first base substrate, and a first backflow-blocking pattern in the first peripheral region and having a curvature to surround a vertex portion of the first display region. The second display substrate includes a second alignment layer in a second display region which faces the first display region and a second peripheral region of a second base substrate. The sealing member includes a corner portion having substantially the same curvature as the first backflow-blocking pattern to surround an outline of the first and second peripheral regions.

Abstract translation: 在显示面板及其制造方法中，显示面板包括第一显示基板，第二显示基板和密封部件。 第一显示基板包括第一显示区域中的第一取向层和第一基板的第一周边区域以及第一外围区域中的第一回流阻挡图案，并且具有围绕第一显示器的顶点部分的曲率 地区。 第二显示基板包括与第一显示区域相对的第二显示区域中的第二取向层和第二基板的第二周边区域。 密封构件包括具有与第一回流阻挡图案基本相同的曲率的角部，以围绕第一和第二周边区域的轮廓。

公开(公告)号：US08983404B2

公开(公告)日：2015-03-17

申请号：US13595562

申请日：2012-08-27

Applicant: Joo-yoon Bae ,  Tae-young Kang ,  Jung-ho Kim ,  Yong-gook Park ,  Ho-jun Lee ,  Hee-chul Jeon ,  Sang-ok Cha ,  Won-young Choi

Inventor： Joo-yoon Bae ,  Tae-young Kang ,  Jung-ho Kim ,  Yong-gook Park ,  Ho-jun Lee ,  Hee-chul Jeon ,  Sang-ok Cha ,  Won-young Choi

IPC: H04B1/38 ,  H04W4/02 ,  G06Q10/02 ,  H04M1/725

CPC classification number: H04W4/021 ,  G06Q10/02 ,  H04L67/18 ,  H04L67/325 ,  H04M1/7253 ,  H04N21/251 ,  H04W4/02

Abstract: A method of providing content is provided. The method includes providing an interface for providing a service based on information regarding a wireless transceiver positioned close to an apparatus for providing content, the information being received from the wireless transceiver; requesting a waiting number for providing the service via the interface; and receiving the waiting number for providing the service, a waiting time, and content based on the waiting time.

Abstract translation: 提供了提供内容的方法。 该方法包括提供一种接口，用于基于关于无线收发器的信息来提供服务，该无线收发器位于靠近用于提供内容的设备的位置，该信息正在从无线收发器接收; 请求经由该接口提供服务的等待号码; 并且基于等待时间接收用于提供服务的等待号码，等待时间和内容。