中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

120 records (took 0.032 seconds)

    Integrated Circuit Including a Programmable Logic Analyzer with Enhanced Analyzing and Debugging Capabilities and a Method Therefor
    73.
    发明申请
    Integrated Circuit Including a Programmable Logic Analyzer with Enhanced Analyzing and Debugging Capabilities and a Method Therefor 审中-公开
    包括具有增强的分析和调试能力的可编程逻辑分析仪的集成电路及其方法

    公开(公告)号：US20160011953A1

    公开(公告)日：2016-01-14

    申请号：US14547745

    申请日：2014-11-19

    Applicant: James Ray Bailey

    Inventor： James Ray Bailey

    IPC: G06F11/263 ,  G01R31/3177

    CPC classification number: G06F11/263 ,  G01R31/31705 ,  G01R31/3177 ,  G06F11/2294

    Abstract: An integrated circuit including a logic analyzer with enhanced analyzing and debugging capabilities and a method therefor. In one embodiment of the present invention, an embedded logic analyzer (ELA) receives a plurality of signals from a plurality of buses within an integrated circuit (IC). The ELA includes an interconnect module to select a trigger signal and/or a sampled signal from the plurality of received signals. A trigger module sets at least one trigger condition and detects if the trigger signal satisfies the at least one trigger condition. When the trigger condition is satisfied, an output module performs at least one task based upon the satisfied at least one trigger condition. If a sampling process is initiated by the output module, the plurality of sampled signals is sampled and may be stored in a memory. The capability of the output module to perform multiple user-defined tasks enhances the debugging capability of the ELA and makes it more versatile.

    Abstract translation: 一种集成电路，包括具有增强的分析和调试能力的逻辑分析仪及其方法。 在本发明的一个实施例中，嵌入式逻辑分析器（ELA）从集成电路（IC）内的多个总线接收多个信号。 ELA包括互连模块，用于从多个接收信号中选择触发信号和/或采样信号。 触发模块设置至少一个触发条件，并检测触发信号是否满足至少一个触发条件。 当满足触发条件时，输出模块基于满足的至少一个触发条件来执行至少一个任务。 如果由输出模块启动采样处理，则对采样的多个信号进行采样并将其存储在存储器中。 输出模块执行多个用户定义任务的能力增强了ELA的调试能力，使其更加通用。

    Integrated circuit including a programmable logic analyzer with enhanced analyzing and debugging capabilities and a method therefor
    74.
    发明授权
    Integrated circuit including a programmable logic analyzer with enhanced analyzing and debugging capabilities and a method therefor 有权
    集成电路包括具有增强的分析和调试能力的可编程逻辑分析仪及其方法

    公开(公告)号：US08516304B2

    公开(公告)日：2013-08-20

    申请号：US12877846

    申请日：2010-09-08

    Applicant: James Ray Bailey ,  Christopher Wilson Case ,  James Patrick Sharpe

    Inventor： James Ray Bailey ,  Christopher Wilson Case ,  James Patrick Sharpe

    IPC: G06F11/00

    CPC classification number: G01R31/3177 ,  G06F11/2294

    Abstract: An integrated circuit including a logic analyzer with enhanced analyzing and debugging capabilities and a method therefore. In one embodiment, an integrated circuit includes a logic analyzer having a first input receiving a plurality of signals and an output for providing an indication of a detection, by the logic analyzer, of at least one trigger event; and a built in self test block having a first input for receiving one or more of the signals appearing at the first input of the logic analyzer, a second input coupled to the output of the logic analyzer for selectively enabling the BIST block, the BIST block generating and maintaining a signature based upon the first and second inputs thereof.

    Abstract translation: 包括具有增强的分析和调试功能的逻辑分析仪的集成电路及其方法。 在一个实施例中，集成电路包括具有接收多个信号的第一输入的逻辑分析器和用于通过逻辑分析仪提供对至少一个触发事件的检测指示的输出; 以及内置自测试块，其具有用于接收出现在所述逻辑分析仪的第一输入端的一个或多个信号的第一输入;耦合到所述逻辑分析器的输出的第二输入，用于选择性地启用所述BIST块，所述BIST块 基于其第一和第二输入产生和维护签名。

    Low fuel permeation primer bulb
    75.
    发明授权
    Low fuel permeation primer bulb 有权
    低燃油渗透底漆灯泡

    公开(公告)号：US08403654B2

    公开(公告)日：2013-03-26

    申请号：US12751526

    申请日：2010-03-31

    Applicant: James Ray Podesta ,  Robert Denton ,  Benny R. Foreman

    Inventor： James Ray Podesta ,  Robert Denton ,  Benny R. Foreman

    IPC: F02M1/16

    CPC classification number: F04B33/00 ,  Y10T137/86099

    Abstract: A fuel primer is disclosed. The primer includes a rigid valve body having first and second ends with first and second check valves therein. The pump also includes an elastic and substantially fuel impermeable bulb substantially encasing the rigid valve body and sealing to the valve body proximate the first and second check valves.

    Abstract translation: 公开了燃料底漆。 底漆包括刚性阀体，其具有第一和第二端，其中具有第一和第二止回阀。 泵还包括基本上包围刚性阀体的弹性且基本上燃料不可渗透的灯泡，并且密封靠近第一和第二止回阀的阀体。

    Tactical Reflectoscope
    76.
    发明申请
    Tactical Reflectoscope 审中-公开
    战术反射镜

    公开(公告)号：US20120005938A1

    公开(公告)日：2012-01-12

    申请号：US13179494

    申请日：2011-07-09

    Applicant: James Ray Sloan

    Inventor： James Ray Sloan

    IPC: F41G1/30 ,  G02B23/02 ,  F41C27/00 ,  F41G1/00 ,  F41G1/35

    CPC classification number: F41G1/40 ,  G02B23/02 ,  G02B27/143

    Abstract: A three mirror-plane reflectoscope target acquisition accessory, with no moving parts, which mounts to the top, side or under any gun and many other apparatus to allow the user to: view, acquire and/or take action accurately from a cover and hidden position, around a corner, situating their person 90° to the side, above or below what is known as a typical firing position to the gun or host to which the tactical reflectoscope is affixed.

    Abstract translation: 三镜面反射镜目标采集附件，没有移动部件，安装在顶部，侧面或下面的任何枪和许多其他设备，以允许用户：从盖子和隐藏的视图，获取和/或准确地采取行动 位置，围绕一个角落，将他们的人物朝向侧面，将所谓的典型的射击位置的上方或下方置于与装有战术反射镜的枪或主机上的90度。

    Systems and methods for error diffusion
    79.
    发明授权
    Systems and methods for error diffusion 有权
    错误扩散的系统和方法

    公开(公告)号：US07551323B2

    公开(公告)日：2009-06-23

    申请号：US10414854

    申请日：2003-04-16

    Applicant: James Ray Bailey ,  Curt Paul Breswick ,  David Allen Crutchfield ,  Ronald Edward Garnett ,  Bob Thai Pham ,  James Alan Ward

    Inventor： James Ray Bailey ,  Curt Paul Breswick ,  David Allen Crutchfield ,  Ronald Edward Garnett ,  Bob Thai Pham ,  James Alan Ward

    IPC: H04N1/56 ,  H04N1/60

    CPC classification number: H04N1/52 ,  H04N1/4052

    Abstract: Error diffusion is performed upon input image data. In one aspect, multiple error diffusion processing elements perform error diffusion on a selected pixel in parallel. In another aspect, the error diffusion logic is integrally formed with a fast local memory in the same electronic device, such as an ASIC. The error data produced by the error diffusion logic for a pixel is buffered in the fast local memory until it is to be used by the error diffusion logic on other pixels. In still another aspect, a first-in-first-out (FIFO) buffer regulates or buffers the color image data between the output of a color conversion system, such as a colorant lookup table, and the input an error diffusion processing element. In yet another aspect, the error diffusion logic has tagging logic that produces and stores an indicator, either in the output data stream itself or in a separate area, to indicate whether a raster contains printable data.

    Abstract translation: 对输入图像数据执行误差扩散。 在一个方面，多个误差扩散处理元件并行地对所选择的像素执行误差扩散。 在另一方面，误差扩散逻辑与同一电子设备（例如ASIC）中的快速本地存储器整体形成。 由像素的误差扩散逻辑产生的误差数据被缓冲在快速本地存储器中，直到其被其它像素上的误差扩散逻辑使用。 在另一方面，先入先出（FIFO）缓冲器在诸如着色查找表的颜色转换系统的输出和输入误差扩散处理元件之间调节或缓冲彩色图像数据。 在另一方面，误差扩散逻辑具有标记逻辑，该标签逻辑在输出数据流本身中或在单独的区域中产生和存储指示符，以指示光栅是否包含可打印数据。

Patent Agency Ranking