公开(公告)号：US20250080108A1

公开(公告)日：2025-03-06

申请号：US18461648

申请日：2023-09-06

Applicant: Texas Instruments Incorporated

Inventor： Ahmed Essam Hashim ,  Kevin Scoones

IPC: H03K17/687 ,  H02M3/158 ,  H03K17/22

Abstract: Described embodiments include a power driver circuit having a first transistor coupled between an input voltage terminal and an intermediate terminal, and having a first control terminal. A second transistor is coupled between the intermediate terminal and a switching terminal, and has a second control terminal coupled to an output of a gate drive circuit. A first diode has a first anode coupled to the input voltage terminal, and a first cathode coupled to the first control terminal through a resistor. A first voltage clamp circuit is coupled between the first control terminal and the intermediate terminal. A second voltage clamp circuit is coupled between the first control terminal and the switching terminal. A second diode is coupled between the first control terminal and a voltage supply terminal.

公开(公告)号：US20250080102A1

公开(公告)日：2025-03-06

申请号：US18506273

申请日：2023-11-10

Applicant: Texas Instruments Incorporated

Inventor： Taisuke Kazama ,  Mustapha El-Markhi ,  Avadhut Junnarkar

IPC: H03K17/082 ,  H02H9/04 ,  H02M1/14 ,  H02M3/156 ,  H03K17/687

Abstract: Described embodiments include a voltage clamping circuit having a threshold-setting circuit with a threshold input and a threshold output. A switch has a first terminal coupled to the threshold input, a second switch terminal, and a switch control terminal. A first transistor is coupled between the threshold output and the switch control terminal, and has a first control terminal. A second transistor is coupled between the first control terminal and ground, and has a second control terminal. A first driver circuit has a first driver input and a first driver output. A second driver circuit has a second driver input coupled to the first driver input, and a second driver output. A third transistor is coupled between the threshold input and ground, and has a third control terminal that is coupled to the second control terminal and the second switch terminal.

公开(公告)号：US20250080096A1

公开(公告)日：2025-03-06

申请号：US18241080

申请日：2023-08-31

Applicant: Texas Instruments Incorporated

Inventor： Sovan Ghosh ,  Visvesvaraya Appala Pentakota

IPC: H03K5/01 ,  H03M1/12

Abstract: An example apparatus includes programmable circuitry configured to: provide a sample signal, a time amplification (TA) signal, and a kick signal to sample and conversion circuitry; sample a differential signal for a first amount of time-based on the sample signal; charge a first capacitor for a second amount of time-based on the first kick signal; after the first amount of time and the second amount of time, charge a second capacitor, the charging based on the first TA signal, the charging to cause a falling edge in a first delay signal; and generating, a rising edge in the delay signal based on the falling edge of O_RST signal.

公开(公告)号：US20250079268A1

公开(公告)日：2025-03-06

申请号：US18240614

申请日：2023-08-31

Applicant: Texas Instruments Incorporated

Inventor： Makoto Shibuya ,  Kwang-Soo Kim ,  Woochan Kim

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

Abstract: An electronic device includes a first semiconductor die attached to a first conductive die attach pad and having a first electronic component, a second semiconductor die attached to a second conductive die attach pad and having a second electronic component, a first package structure that encloses the first semiconductor die and a portion of the first die attach pad, a second package structure that encloses the second semiconductor die and a portion of the second die attach pad, and a conductive metal structure that is electrically connected to the first and second electronic components and extends between the first and second package structures, the conductive metal structure exposed outside the first and second package structures.

公开(公告)号：US20250077466A1

公开(公告)日：2025-03-06

申请号：US18953323

申请日：2024-11-20

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jian WANG

IPC: G06F13/42 ,  G06F15/78

Abstract: A system timer bus used by the processor elements in systems, such as an ARM-based system on a chip (SoC), is driven using a Precision Time Measurement (PTM) value. This allows the processor elements to be synchronized to the PCIe ports that use PTM. When two SoCs are connected using PCIe links, this example allows the processor elements in both SoCs to be synchronized. As the processor elements are synchronized, associated tasks on the two SoCs are synchronized, so that overall operations are synchronized.

公开(公告)号：US20250076945A1

公开(公告)日：2025-03-06

申请号：US18498757

申请日：2023-10-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Ruchi Shankar ,  Robin O. Hoel ,  Patrick Seem ,  Oddgeir Fikstvedt ,  Jan-Tore Marienborg

IPC: G06F1/26 ,  G06F1/3203 ,  H03K3/356 ,  H03K19/0185

Abstract: Embodiments disclosed herein relate to split rail architecture for power supplies in a system, and more particularly, to providing isolation and control of a power supply. In an example, an integrated circuit device is provided that includes a device voltage supply, an input/output (I/O) voltage supply coupled to the device voltage supply, and a level shifter circuit coupled to the I/O voltage supply. The level shifter circuit includes a pair of cross-coupled p-type metal-oxide semiconductor field effect transistors (PMOS transistors), a pair of n-type transistors (NMOS transistors) coupled between the pair of cross-coupled PMOS transistors and a ground connection, and an inverter circuit coupled to the device voltage supply and the level shifter circuit. The level shifter circuit further includes a capacitor coupled to the pair of cross-coupled PMOS transistors and the ground connection and is in parallel with respect to a first one of the pair of NMOS transistors.

公开(公告)号：US20250076190A1

公开(公告)日：2025-03-06

申请号：US18950734

申请日：2024-11-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jeronimo Segovia Fernandez ,  Bichoy Bahr ,  Hassan Omar Ali ,  Benjamin Stassen Cook

IPC: G01N21/3504 ,  B81B3/00 ,  G01J5/08 ,  G01N21/27 ,  G01N21/61

Abstract: In some examples, an apparatus comprises a chopper, a first microelectromechanical system (MEMS) device, a second MEMS device, and a processing circuit. The chopper configured is to repeatedly switch states to enable and disable provision of a light signal. The first MEMS device is configured to provide first and second irradiance signals when the chopper is in, respectively, first and second states The second MEMS device is configured to provide first and second reference signals when the chopper is in, respectively, the first and second states. The processing circuit is configured to generate a first signal based on the first irradiance signal and the first reference signal, generate a second signal based on the second irradiance signal and the second reference signal, and provide a third signal at the processing output representing an irradiance measurement of the light source based on a difference between the first and second signals.

公开(公告)号：US12244304B2

公开(公告)日：2025-03-04

申请号：US18193905

申请日：2023-03-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Vipul K. Singhal

IPC: H03K17/687

Abstract: In examples, an apparatus has input and output terminals, and includes a first transistor having a first gate, source, and drain, wherein the first source is coupled to the input terminal, and the first drain is coupled to the output terminal, a second transistor having a second gate, source, and drain, wherein the second gate is coupled to a ground terminal, and the second source is coupled to the first gate, a third transistor having a third gate, source, and drain, wherein the third gate is coupled to an enable terminal, the third source is coupled to the ground terminal, and the third drain is coupled to the second drain, and a fourth transistor having a fourth gate, source, and drain, wherein the fourth gate is coupled to the second drain, the fourth source is coupled to the second source, and the fourth drain is coupled to the input terminal.

公开(公告)号：US12242056B2

公开(公告)日：2025-03-04

申请号：US18295048

申请日：2023-04-03

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Zhongyan Sheng ,  Xi Zhou

IPC: G02B5/04 ,  G02B3/00 ,  G02B27/01 ,  G02B27/09 ,  G02B27/10

Abstract: An apparatus includes a light source configured to produce light and a prism. The apparatus also includes freeform optics optically coupled between the light source and the prism, the freeform optics configured to direct the light towards the prism and eyepiece optics optically coupled to the prism. Additionally, the apparatus includes a spatial light modulator (SLM) optically coupled to the prism, the prism configured to direct the light towards the SLM, the SLM configured to modulate the light to produce modulated light, and the prism configured to direct the modulated light towards the eyepiece optics.

公开(公告)号：US20250071303A1

公开(公告)日：2025-02-27

申请号：US18943341

申请日：2024-11-11

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Shyam Jagannathan ,  Naveen Srinivasamurthy

IPC: H04N19/433 ,  H04N19/43

Abstract: A video encoder including a first buffer containing a plurality of data values defining a macroblock of pixels of a video frame. The video encoder also includes a second buffer and an entropy encoder coupled to the first and second buffers and configured to encode a macroblock based on another macroblock. The entropy encoder identifies a subset of the data values from the first buffer defining a given macroblock and copies the identified subset to the second buffer, the subset of data values being just those data values used by the entropy encoder when subsequently encoding another macroblock.