DETECTING FLUID LEVELS USING A COUNTER
    71.
    发明申请

    公开(公告)号:US20190111695A1

    公开(公告)日:2019-04-18

    申请号:US16094101

    申请日:2016-04-29

    Abstract: An example printing cartridge includes a fluid container, a plurality of sensing locations in thermal contact with the fluid container, a voltage comparator to output time-based information based on a comparison of a sensed voltage generated at a selected sensing location of the plurality of sensing locations to a threshold voltage, the time-based information representative of whether a fluid is present at a fluid level associated with the selected sensing location, and a counter to convert the time-based information to a digital code based on a number of clock cycles.

    EVALUATING PRINT NOZZLE CONDITION
    73.
    发明申请
    EVALUATING PRINT NOZZLE CONDITION 审中-公开
    评估打印喷嘴条件

    公开(公告)号:US20170001433A1

    公开(公告)日:2017-01-05

    申请号:US15114938

    申请日:2014-01-30

    Abstract: Systems and methods for evaluating the condition of a print nozzle are described. In one example, impedances across the print nozzle are measured. Subsequently, first test result and second test result are determined and registered at a first predetermined time instant and at a second predetermined time instant, respectively. The first test result and the second test result are obtained based on the measured impedances. Based on the first test result and the second test result, the condition of the print nozzle, is determined.

    Abstract translation: 描述了用于评估打印喷嘴条件的系统和方法。 在一个示例中,测量打印喷嘴两端的阻抗。 随后,分别在第一预定时刻和第二预定时刻确定并登记第一测试结果和第二测试结果。 基于测量的阻抗获得第一测试结果和第二测试结果。 基于第一测试结果和第二测试结果,确定打印喷嘴的状态。

    Mitigating parasitic current while programming a floating gate memory array
    74.
    发明授权
    Mitigating parasitic current while programming a floating gate memory array 有权
    在编程浮动栅极存储器阵列时减轻寄生电流

    公开(公告)号:US09472288B2

    公开(公告)日:2016-10-18

    申请号:US14527466

    申请日:2014-10-29

    Abstract: Methods to program a floating gate memory array include, in response to a request to program a second bit of the floating gate memory array, at a first time, outputting a programming voltage to cause a first node voltage at a first source of a first transistor corresponding to a first bit, wherein the first node voltage is greater than a second node voltage at a second source of a second transistor corresponding to the second bit. The method further includes at a second time, increasing the programming voltage of the floating gate memory array to program the second bit of the floating gate memory array.

    Abstract translation: 编程浮动栅极存储器阵列的方法包括响应于对浮置栅极存储器阵列的第二位进行编程的请求,在第一时间输出编程电压以使第一晶体管的第一源处的第一节点电压 对应于第一位,其中第一节点电压大于对应于第二位的第二晶体管的第二源处的第二节点电压。 该方法还包括第二时间,增加浮动栅极存储器阵列的编程电压以对浮动栅极存储器阵列的第二位进行编程。

    PRINT COMPONENT HAVING FLUIDIC ACTUATING STRUCTURES WITH DIFFERENT FLUIDIC ARCHITECTURES

    公开(公告)号:US20240009994A1

    公开(公告)日:2024-01-11

    申请号:US18139106

    申请日:2023-04-25

    CPC classification number: B41J2/0458 B41J2/04585 B41J2002/14475

    Abstract: A print component includes an array of fluidic actuation structures including a first column of fluidic actuating structures addressable by a set of actuation addresses, each fluidic actuating structure having a different one of the actuation addresses and having a fluidic architecture type, and a second column of fluidic actuating structures addressable by the set of actuation addresses. Each fluidic actuating structure of the second column has a different one of the actuation addresses and has a same fluidic architecture type as the fluidic actuating structure of the first column having the same address. An address bus communicates the set of addresses to the array of fluidic actuating structures, and a fire signal line communicates a plurality of fire pulse signal types to the array of fluidic actuating structures, the fire pulse signal type depending on the actuation address on the address bus.

    ACCESSING REGISTERS OF FLUID EJECTION DEVICES

    公开(公告)号:US20230356525A1

    公开(公告)日:2023-11-09

    申请号:US18225023

    申请日:2023-07-21

    CPC classification number: B41J2/04541 B41J2/04586

    Abstract: An integrated circuit to drive a plurality of fluid actuation devices includes a status register, a plurality of interfaces, and control logic. The plurality of interfaces include a mode interface, a data interface, and a fire interface. The control logic enables reading of the status register in response to a signal on the mode interface transitioning to logic high with a logic high signal on the data interface, and transitioning a signal on the fire interface to logic high with the signal on the single data interface floating.

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