公开(公告)号：US09601088B2

公开(公告)日：2017-03-21

申请号：US14467130

申请日：2014-08-25

Applicant: InnoLux Corporation

Inventor： Kazuyuki Hashimoto

IPC: G09G5/18 ,  G09G3/32

CPC classification number: G09G5/18 ,  G09G3/3208 ,  G09G2330/028

Abstract: A display device includes a controller chip and a storage circuit. The controller chip includes a clock generating circuit configured to generate a clock signal. The storage circuit is coupled to the clock generating circuit and includes a first electronic component. In a falling edge of the clock signal, a voltage of the clock signal falls in multiple steps from a system high voltage to a first target voltage and then to a system low voltage, and in a rising edge of the clock signal, the voltage of the clock signal rises in multiple steps from the system low voltage to the first target voltage and then to the system high voltage.

公开(公告)号：US09325311B1

公开(公告)日：2016-04-26

申请号：US14549498

申请日：2014-11-20

Applicant: Innolux Corporation

Inventor： Shinji Konoshita ,  Kazuyuki Hashimoto

IPC: H03K17/68 ,  H03K17/687 ,  G09G3/36 ,  G09G5/14

CPC classification number: H03K17/687 ,  G09G3/20 ,  G09G3/3266 ,  G09G3/3655 ,  G09G3/3677 ,  G09G3/3696 ,  G09G2300/0426 ,  G09G2310/0243 ,  G09G2310/0267 ,  G09G2310/0283 ,  G09G2310/0286

Abstract: A gate driver comprises an ith stage gate driver circuit including a latch circuit and a first output circuit. The latch circuit includes a first input for receiving an (i−1)th gate signal, a second input for receiving a first clock signal, a first output for outputting a first output signal, and a second output for outputting a second output signal. The first output circuit comprises a first transistor, a second transistor and a capacitor. The first transistor includes a control terminal coupled to the first output, a first terminal coupled to a first clock input and a second terminal coupled to a first output node. The second transistor includes a control terminal coupled to the second output, a first terminal coupled to the first output node and a second terminal coupled to a reference signal. The capacitor is coupled between the first transistor and the first output node.

Abstract translation: 栅极驱动器包括第i级栅极驱动器电路，其包括锁存电路和第一输出电路。 锁存电路包括用于接收第（i-1）门信号的第一输入端，用于接收第一时钟信号的第二输入端，用于输出第一输出信号的第一输出端和用于输出第二输出信号的第二输出端。 第一输出电路包括第一晶体管，第二晶体管和电容器。 第一晶体管包括耦合到第一输出端的控制端子，耦合到第一时钟输入端的第一端子和耦合到第一输出节点的第二端子。 第二晶体管包括耦合到第二输出端的控制端子，耦合到第一输出节点的第一端子和耦合到参考信号的第二端子。 电容器耦合在第一晶体管和第一输出节点之间。

公开(公告)号：US09058780B2

公开(公告)日：2015-06-16

申请号：US13791572

申请日：2013-03-08

Applicant: INNOLUX CORPORATION

Inventor： Naoki Sumi ,  Kazuyuki Hashimoto ,  Toshihiko Araki ,  Satoru Takahashi

IPC: G09G3/36 ,  G06F3/044

CPC classification number: G09G3/36 ,  G06F3/0412 ,  G06F3/044 ,  G09G3/003 ,  G09G3/3622 ,  G09G2354/00

Abstract: A 2D/3D switchable and touch sensitive display, comprising a display panel with a plurality of pixels and a LC cell is disclosed. The LC cell is disposed on the display panel for providing 2D/3D switchable and touch sensitive function. The LC cell comprises a first substrate and a second substrate opposite to each other, a plurality of first electrodes disposed on the first substrate, a plurality of second electrodes disposed on the second substrate, and a liquid crystal layer disposed between the first electrodes and the second electrodes. The second electrodes interlaced with the first electrodes. The liquid crystal layer is controlled by a voltage between the first electrodes and the second electrodes for adjusting light path from the display panel and/or touch sensing.

Abstract translation: 公开了一种2D / 3D可切换和触敏显示器，其包括具有多个像素的显示面板和LC单元。 LC单元设置在显示面板上，用于提供2D / 3D可切换和触敏功能。 LC单元包括彼此相对的第一基板和第二基板，设置在第一基板上的多个第一电极，设置在第二基板上的多个第二电极以及设置在第一电极和第二基板之间的液晶层 第二电极。 第二电极与第一电极交错。 液晶层由第一电极和第二电极之间的电压控制，用于调节来自显示面板的光路和/或触摸感测。