公开(公告)号：US20230199077A1

公开(公告)日：2023-06-22

申请号：US18067097

申请日：2022-12-16

Applicant: Intel Corporation

Inventor： Rajesh Poornachandran ,  Vincent Zimmer ,  Subrata Banik ,  Marcos Carranza ,  Kshitij Arun Doshi ,  Francesc Guim Bernat ,  Karthik Kumar

IPC: H04L67/51 ,  H04L67/562 ,  H04L41/5009 ,  H04L9/32

CPC classification number: H04L67/51 ,  H04L67/562 ,  H04L41/5009 ,  H04L9/3278 ,  H04L9/50

Abstract: An apparatus to facilitate provenance audit trails for microservices architectures is disclosed. The apparatus includes one or more processors to: obtain, by a microservice of a service hosted in a datacenter, provisioned credentials for the microservice based on an attestation protocol; generate, for a task performed by the microservice, provenance metadata for the task, the provenance metadata including identification of the microservice, operating state of at least one of a hardware resource or a software resource used to execute the microservice and the task, and operating state of a sidecar of the microservice during the task; encrypt the provenance metadata with the provisioned credentials for the microservice; and record the encrypted provenance metadata in a local blockchain of provenance metadata maintained for the hardware resource executing the task and the microservice.

公开(公告)号：US20230195601A1

公开(公告)日：2023-06-22

申请号：US17557953

申请日：2021-12-21

Applicant: Intel Corporation

Inventor： Rajesh Poornachandran ,  Marcos Carranza

IPC: G06F11/36 ,  G06F11/32 ,  G06K9/62 ,  G06N20/00

CPC classification number: G06F11/366 ,  G06F11/323 ,  G06F11/3608 ,  G06F11/3664 ,  G06K9/6256 ,  G06N20/00

Abstract: An apparatus to facilitate synthetic data generation for enhanced microservice debugging is disclosed. The apparatus includes one or more processors to: load a filter for a synthetic data generator for a service deployed in a datacenter system, the filter configured for the service based on service policies; prioritize synthetic parameters of the filter based on service parameters used to model microservices deployed for the service; generate a synthetic dataset for ingestion using the prioritized synthetic parameters in the filter of the synthetic data generator, the synthetic dataset generated by applying the synthetic parameters of the filter to an original infield dataset of the service; demultiplex the synthetic dataset in response to a synthetic activation profile generated using the synthetic dataset matching one or more monitored previous activation profiles of the service; and reverse map the demultiplexed synthetic dataset to match to original data in the original infield dataset.

公开(公告)号：US20230195485A1

公开(公告)日：2023-06-22

申请号：US17556690

申请日：2021-12-20

Applicant: Intel Corporation

Inventor： Devamekalai Nagasundaram ,  San Yen Wong ,  Haarika Madaka ,  Wei Seng Yeap ,  Marcos Carranza ,  Cesar Martinez Spessot ,  Francesc Guim Bernat ,  Rajesh Poornachandran

IPC: G06F9/455 ,  G06F9/50

CPC classification number: G06F9/45558 ,  G06F9/505 ,  G06F2009/4557

Abstract: Embodiments described herein are generally directed to assigning virtual machine (VM) workloads to groupings/partitions of accelerator resources. In an example, a processing resource of a host system maintains: (i) a resource data structure containing resource utilization information for each of one or more accelerators associated with the host system; and (ii) a group data structure containing information regarding each group of multiple groups of one or more virtual functions (VFs) of the one or more accelerators that has been assigned for use by a respective VM of multiple VMs running on a virtual machine monitor (VMM) of the processing resource. A request to deploy a workload associated with a first VM is received. Responsive to the request, the workload is assigned to a VF of a group of the multiple groups determined to have resource capacity available to satisfy expected resource utilization of the workload.

公开(公告)号：US11637687B2

公开(公告)日：2023-04-25

申请号：US16723743

申请日：2019-12-20

Applicant: Intel Corporation

Inventor： Ned Smith ,  Francesc Guim Bernat ,  Sanjay Bakshi ,  Paul O'Neill ,  Ben McCahill ,  Brian A. Keating ,  Adrian Hoban ,  Kapil Sood ,  Mona Vij ,  Nilesh Jain ,  Rajesh Poornachandran ,  Trevor Cooper ,  Kshitij A. Doshi ,  Marcin Spoczynski

IPC: H04L29/06 ,  H04L9/00 ,  G06F16/28 ,  H04L9/06

Abstract: Methods, apparatus, systems and articles of manufacture to determine provenance for data supply chains are disclosed. Example instructions cause a machine to at least, in response to data being generated, generate a local data object and object metadata corresponding to the data; hash the local data object; generate a hash of a label of the local data object; generate a hierarchical data structure for the data including the hash of the local data object and the hash of the label of the local data object; generate a data supply chain object including the hierarchical data structure; and transmit the data and the data supply chain object to a device that requested access to the data.

公开(公告)号：US11558265B1

公开(公告)日：2023-01-17

申请号：US17557937

申请日：2021-12-21

Applicant: Intel Corporation

Inventor： Rajesh Poornachandran ,  Marcos Carranza

IPC: H04L41/5009 ,  H04L43/55 ,  G06F9/455

Abstract: An apparatus to facilitate telemetry targeted query injection for enhanced debugging in microservices architectures is disclosed. The apparatus includes one or more processors to: identify contextual trace of a previous query recorded in collected data of a service, where microservices of the service responded to the previous query; access an interdependency flow graph representing an architecture and interaction of microservices deployed for a service; retrieve, based on the interdependency flow graph, telemetry data of the microservices corresponding to the contextual trace; identify, based on the telemetry data, an activation profile corresponding to the previous query, the activation profile detailing a response of the microservices to the previous query; compare the activation profile to a correlation profile for the previous query to detect whether an anomaly occurred in the service in response to the previous query; and recommend a modified query based on detection of the anomaly.

公开(公告)号：US11533316B2

公开(公告)日：2022-12-20

申请号：US16455211

申请日：2019-06-27

Applicant: Intel Corporation

Inventor： Ned M. Smith ,  Srikathyayani Srikanteswara ,  Ravikumar Balakrishnan ,  Rajesh Poornachandran ,  Moreno Ambrosin

IPC: H04L9/40 ,  H04L9/32 ,  H04L69/22 ,  H04W60/00

Abstract: Systems and techniques for information-centric network namespace policy-based content delivery are described herein. A registration request may be received from a node on an information-centric network (ICN). Credentials of the node may be validated. The node may be registered with the ICN based on results of the validation. A set of content items associated with the node may be registered with the ICN. An interest packet may be received from a consumer node for a content item of the set of content items that includes an interest packet security level for the content item. Compliance of the security level of the node with the interest packet security level may be determined. The content item may be transmitted to the consumer node.

公开(公告)号：US20220200788A1

公开(公告)日：2022-06-23

申请号：US17561558

申请日：2021-12-23

Applicant: Intel Corporation

Inventor： Timothy Verrall ,  Thomas Willhalm ,  Francesc Guim Bernat ,  Karthik Kumar ,  Ned M. Smith ,  Rajesh Poornachandran ,  Kapil Sood ,  Tarun Viswanathan ,  John J. Browne ,  Patrick Kutch

IPC: H04L9/08

Abstract: Technologies for accelerated key caching in an edge hierarchy include multiple edge appliance devices organized in tiers. An edge appliance device receives a request for a key, such as a private key. The edge appliance device determines whether the key is included in a local key cache and, if not, requests the key from an edge appliance device included in an inner tier of the edge hierarchy. The edge appliance device may request the key from an edge appliance device included in a peer tier of the edge hierarchy. The edge appliance device may activate per-tenant accelerated logic to identify one or more keys in the key cache for eviction. The edge appliance device may activate per-tenant accelerated logic to identify one or more keys for pre-fetching. Those functions of the edge appliance device may be performed by an accelerator such as an FPGA. Other embodiments are described and claimed.

公开(公告)号：US20220197613A1

公开(公告)日：2022-06-23

申请号：US17692405

申请日：2022-03-11

Applicant: Intel Corporation

Inventor： Michael Kinsner ,  Rajesh Poornachandran ,  John Freeman

IPC: G06F8/41

Abstract: An apparatus to facilitate clock gating and clock scaling based on runtime application task graph information is disclosed. The apparatus includes a processor to: receive, from a compiler, a bitstream generated from code of an application, the bitstream related to a workload of the application; generate a task graph of the application using at least part of the bitstream, the task graph to represent one of a relationship and dependency of the code; program the bitstream to an accelerator device, wherein the bitstream to configure the accelerator device to support the workload of the application; execute one or more kernels of the code using the accelerator device; identify one or more optimizations for the accelerator device based on the task graph of the application; and transmit a command to cause the one or more optimizations to be implemented in the at least one region of the accelerator device.

公开(公告)号：US20220141026A1

公开(公告)日：2022-05-05

申请号：US17133367

申请日：2020-12-23

Applicant: Intel Corporation

Inventor： Ned M. Smith ,  Gaurav Kumar ,  Alex Nayshtut ,  Reshma Lal ,  Prashant Dewan ,  Pradeep Pappachan ,  Rajesh Poornachandran ,  Omer Ben-Shalom

IPC: H04L9/32 ,  G06T1/20 ,  G06T1/60 ,  H04L9/08 ,  H04L29/06 ,  G06F9/50 ,  G06F8/65 ,  G06N3/04 ,  G06N3/08

Abstract: Methods, apparatuses and system provide for technology that interleaves a plurality of verification commands with a plurality of copy commands in a command buffer, wherein each copy command includes a message authentication code (MAC) derived from a master session key, wherein one or more of the plurality of verification commands corresponds to a copy command in the plurality of copy commands, and wherein a verification command at an end of the command buffer corresponds to contents of the command buffer. The technology may also add a MAC generation command to the command buffer, wherein the MAC generation command references an address of a compute result.

公开(公告)号：US20220113978A1

公开(公告)日：2022-04-14

申请号：US17560025

申请日：2021-12-22

Applicant: Intel Corporation

Inventor： Rajesh Poornachandran ,  Vincent Zimmer

IPC: G06F9/38 ,  G06F9/455 ,  G06F21/54

Abstract: Methods, apparatus, and articles of manufacture to conditionally activate a big core in a computing system are disclosed. An example apparatus including instructions stored in the apparatus; and processor circuitry to execute the instructions to: in response to a request to operate two or more processing devices as a single processing device, determine whether the two or more processing devices are available and capable of executing instructions according to the request; when the two or more processing devices are available and capable: split the instructions into first sub-instructions and second sub-instructions; provide (a) the first sub-instructions to a first processing device of the two or more processing devices and (b) the second sub-instructions to a second processing device of the two or more processing devices; and generate an output by combining a first output of the first processing device and a second output of the second processing device.