公开(公告)号：US20050263774A1

公开(公告)日：2005-12-01

申请号：US11136536

申请日：2005-05-25

Applicant: Do-young Kim ,  Takashi Noguchi ,  Hans Cho ,  Jang-yeon Kwon

Inventor： Do-young Kim ,  Takashi Noguchi ,  Hans Cho ,  Jang-yeon Kwon

IPC: H01L21/20 ,  H01L21/336 ,  H01L21/84 ,  H01L29/04 ,  H01L29/786

CPC classification number: H01L21/02686 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/2026 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78675

Abstract: Provided are a high quality poly-Si structure and a method of fabricating the same. The poly-Si structure includes a substrate, a polycrystallized silicon thin film, and an adhesive layer disposed between them. In the method of fabricating the poly-Si structure, an adhesive layer is first formed on a substrate, a-Si is deposited at a low temperature, and a polycrystallization process of silicon is, then performed by high density energy. Polycrystallization by high energy is possible, and therefore, high quality poly-Si can be achieved. The method can be employed in a low-temperature process, and a heat-sensitive material such as plastic or the like can be used as a substrate.

Abstract translation: 提供了高质量的多晶硅结构及其制造方法。 多晶硅结构包括基板，多晶硅薄膜和设置在它们之间的粘合层。 在制造多晶硅结构的方法中，首先在基板上形成粘合剂层，在低温下沉积a-Si，然后通过高密度能量进行硅的多晶化工​​艺。 通过高能量进行多晶化是可能的，因此可以实现高质量的多晶硅。 该方法可以在低温工艺中使用，并且可以使用诸如塑料等的热敏材料作为基材。

公开(公告)号：US20050145843A1

公开(公告)日：2005-07-07

申请号：US11013398

申请日：2004-12-17

Applicant: Huaxiang Yin ,  Takashi Noguchi ,  Wenxu Xianyu ,  Do-young Kim

Inventor： Huaxiang Yin ,  Takashi Noguchi ,  Wenxu Xianyu ,  Do-young Kim

IPC: H01L29/417 ,  H01L29/423 ,  H01L29/45 ,  H01L29/49 ,  H01L29/786 ,  H01L29/04 ,  H01L21/00

CPC classification number: H01L29/785 ,  H01L29/42384 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/7855

Abstract: A thin film transistor and a method of manufacturing the same are provided. The thin film transistor includes a substrate; a buffer layer formed on the substrate; a source and a drain spaced apart from each other on the buffer layer; a channel layer formed on the buffer layer to connect the source and the drain with each other; and a gate formed on the buffer layer to be spaced apart from the source, the drain and the channel layer.

Abstract translation: 提供薄膜晶体管及其制造方法。 薄膜晶体管包括基板; 形成在所述基板上的缓冲层; 在缓冲层上彼此间隔开的源极和漏极; 形成在所述缓冲层上的沟道层，以将所述源极和所述漏极彼此连接; 以及形成在缓冲层上以与源极，漏极和沟道层间隔开的栅极。

公开(公告)号：US06757871B1

公开(公告)日：2004-06-29

申请号：US09586990

申请日：2000-06-05

Applicant: Chihiro Sato ,  Hiroshi Katsurabayashi ,  Takashi Noguchi ,  Akira Kurosawa ,  Nobuyuki Takeo

Inventor： Chihiro Sato ,  Hiroshi Katsurabayashi ,  Takashi Noguchi ,  Akira Kurosawa ,  Nobuyuki Takeo

IPC: G06F1724

CPC classification number: G06F17/30011 ,  G06F17/24 ,  Y10S707/99938 ,  Y10S707/99943 ,  Y10S707/99953

Abstract: The invention provides a common document editing apparatus that is capable of reflecting the edition content based on a exclusive edition right on a common document even in the case where the exclusive edition right is cancelled forcibly. When an exclusive edition right of a common document stored in a document storing unit is requested, a lock information managing unit issues an exclusive edition right to permit exclusive edition and the lock information in stored in a lock information storing unit. Upon receiving the edition content together with the lock information, the lock information managing unit stores the edition content in the document storing unit only when the received lock information is identical with the lock information stored in the lock information storing unit. When the exclusive edition right is cancelled forcibly, the lock information managing unit 23 stores the lock information in an unlocked lock information storing unit. When the edition content that is identical with the same lock information is requested to be stored before a new exclusive edition right of the same document is requested, the lock information is overwritten in the document storing unit.

Abstract translation: 本发明提供了一种普通文档编辑装置，即使在强制取消排他版权的情况下，也能够在普通文档上基于独家版权反映版本内容。 当请求存储在文档存储单元中的共同文档的专有权时，锁定信息管理单元发布存储在锁定信息存储单元中的专有版权和锁定信息。 当与锁定信息一起接收到版本内容时，锁定信息管理单元仅在所接收的锁定信息与存储在锁定信息存储单元中的锁定信息相同时才将该版本内容存储在文档存储单元中。 当强制取消排他版权时，锁定信息管理单元23将锁定信息存储在解锁锁定信息存储单元中。 当请求在相同文档的新的独家版本权限之前存储与相同锁定信息相同的版本内容时，锁定信息被覆盖在文档存储单元中。

公开(公告)号：US06707166B1

公开(公告)日：2004-03-16

申请号：US09616378

申请日：2000-07-13

Applicant: Takashi Noguchi

Inventor： Takashi Noguchi

IPC: H01L2329

CPC classification number: H01L23/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05553 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device includes a first wall and a second wall. The first wall is arranged in a pad region which surrounds a chip region, and the second wall is arranged on a semiconductor chip mounted in the chip region. Conductive are arranged between the first wall and the second wall and are encapsulated by a encapsulating material formed between the first and second walls.

Abstract translation: 半导体器件包括第一壁和第二壁。 第一壁布置在围绕芯片区域的焊盘区域中，并且第二壁布置在安装在芯片区域中的半导体芯片上。 导电布置在第一壁和第二壁之间并被形成在第一和第二壁之间的封装材料封装。

公开(公告)号：US06649980B2

公开(公告)日：2003-11-18

申请号：US10014105

申请日：2001-12-11

Applicant: Takashi Noguchi

Inventor： Takashi Noguchi

IPC: H01L2701

CPC classification number: H01L21/84 ,  H01L27/1203

Abstract: A semiconductor device including: a gate electrode made from silicon-germanium or germanium; a first semiconductor region formed under the gate electrode with a first gate insulating film between the first semiconductor region and the gate electrode; and a second semiconductor region formed over the gate electrode with a second gate insulating film between the second semiconductor region and the gate electrode, wherein a first conductivity type MOS transistor includes the first semiconductor region, the first gate insulating film, and the gate electrode, and a second conductivity type MOS transistor includes the second semiconductor region, the second gate insulating film, and the gate electrode.

Abstract translation: 一种半导体器件，包括：由硅 - 锗或锗制成的栅电极; 形成在所述栅电极下方的第一半导体区域，所述第一半导体区域在所述第一半导体区域和所述栅电极之间具有第一栅极绝缘膜; 以及第二半导体区域，形成在所述栅极电极上，在所述第二半导体区域和所述栅电极之间具有第二栅极绝缘膜，其中，所述第一导电型MOS晶体管包括所述第一半导体区域，所述第一栅极绝缘膜和所述栅电极， 并且第二导电型MOS晶体管包括第二半导体区域，第二栅极绝缘膜和栅极电极。

公开(公告)号：US06410412B1

公开(公告)日：2002-06-25

申请号：US09663006

申请日：2000-09-15

Applicant: Kenichi Taira ,  Noriyuki Kawashima ,  Takashi Noguchi ,  Dharam Pal Gosain ,  Setsuo Usui

Inventor： Kenichi Taira ,  Noriyuki Kawashima ,  Takashi Noguchi ,  Dharam Pal Gosain ,  Setsuo Usui

IPC: H01L214763

CPC classification number: B82Y10/00 ,  H01L21/28273 ,  H01L29/42332 ,  H01L29/66757 ,  H01L29/7881 ,  Y10S438/927

Abstract: Methods for fabricating memory devices having a multi-dot floating gate ensuring a desirable crystallization of a semiconductor film without ruining the flatness of the surface of the polycrystallized silicon layer and a tunnel oxide film, allowing desirable semiconductor dots to be produced, and allowing production of the memory devices having a multi-dot floating gate with ease and at low costs even when a substrate is made of glass or plastic. Such a method for fabricating memory devices includes steps for forming on a substrate a semiconductor film and treating said semiconductor film by a first laser annealing so as to have a polycrystalline structure; forming on the semiconductor film a semiconductor dot forming film having a non-stoichiometric composition with an excessive content of a semiconductor element; and dispersing semiconductor dots within the semiconductor dot forming film by a second laser annealing thereby to produce semiconductor dots; in which a pulse energy density of the laser used for the first laser annealing is larger than a pulse energy density of the laser used for the second laser annealing.

Abstract translation: 用于制造具有多点浮置栅极的存储器件的方法，其确保半导体膜的期望结晶，而不破坏多晶硅层的表面的平坦度和隧道氧化物膜，从而允许产生期望的半导体点，并且允许 存储器件具有多点浮置栅极，即使当衬底由玻璃或塑料制成时，其容易且成本低廉。 这种用于制造存储器件的方法包括以下步骤：在衬底上形成半导体膜并通过第一激光退火处理所述半导体膜以具有多晶结构; 在半导体膜上形成具有半导体元件含量过多的非化学计量组成的半导体点形成膜; 并通过第二激光退火将半导体点分散在半导体点形成膜内，从而产生半导体点; 其中用于第一激光退火的激光器的脉冲能量密度大于用于第二激光退火的激光器的脉冲能量密度。

公开(公告)号：US06184098B2

公开(公告)日：2001-02-06

申请号：US09252862

申请日：1999-02-18

Applicant: Takashi Noguchi

Inventor： Takashi Noguchi

IPC: H01L21336

CPC classification number: H01L29/456 ,  H01L29/165 ,  H01L29/4941 ,  H01L29/6659 ,  H01L29/7833 ,  Y10S438/933

Abstract: In a field effect transistor, an Si1-xGex layer is provided between a source or drain electrode deriving region and a corresponding metal (interconnection) electrode or between a contact deriving region and a metal layer formed on the upper portions of the contact deriving region to form an ohmic contact to thereby prevent the aluminum metal layer from penetrating into a p-n junction and to reduce a contact resistance.

Abstract translation: 在场效应晶体管中，在源极或漏极导出区域和对应的金属（互连）电极之间或者在接触导出区域和形成在接触导出区域的上部的金属层之间设置Si1-xGex层， 形成欧姆接触，从而防止铝金属层渗透到pn结中并降低接触电阻。

公开(公告)号：US6067868A

公开(公告)日：2000-05-30

申请号：US813763

申请日：1997-03-07

Applicant: Kenichiro Nakamura ,  Toshio Mitsuyama ,  Takashi Noguchi

Inventor： Kenichiro Nakamura ,  Toshio Mitsuyama ,  Takashi Noguchi

IPC: F16H25/20

CPC classification number: F16H25/20 ,  F16H2025/204 ,  Y10T74/18672

Abstract: An anti-rotation mechanism in a linear actuator has outer and inner cylinders, affords high accuracy and rigidity, is simple in structure, not requiring the use of a tie rod, and is inexpensive to manufacture. The outer cylinder 3 has both end portions 3 of circular cross section and an intermediate portion whose inner surface has an axially uniform non-circular cross-sectional shape including a rotation inhibiting surface 3F. The inner cylinder 4 has a collar 7 on the outer peripheral surface which is guided and supported slidably by the intermediate portion of the outer cylinder and has a conforming non-circular cross-sectional shape including a flat surface 7B for sliding engagement with the rotation inhibiting surface 3F to inhibit rotation of the inner cylinder.

Abstract translation: 线性致动器中的防旋转机构具有外筒和内筒，提供高精度和刚性，结构简单，不需要使用拉杆，制造成本低廉。 外筒3具有圆形截面的两个端部3和内表面具有包括旋转抑制面3F的轴向均匀的非圆形横截面形状的中间部。 内筒4具有在外周面上的轴环7，其被外筒的中间部分可滑动地引导和支撑，并且具有一致的非圆形横截面形状，包括平坦表面7B，用于与旋转抑制 表面3F以抑制内筒的旋转。

公开(公告)号：US5856228A

公开(公告)日：1999-01-05

申请号：US757335

申请日：1996-11-27

Applicant: Hiroyuki Miwa ,  Shigeru Kanematsu ,  Takayuki Gomi ,  Hiroaki Anmo ,  Takashi Noguchi ,  Katsuyuki Kato ,  Hirokazu Ejiri ,  Norikazu Ouchi

Inventor： Hiroyuki Miwa ,  Shigeru Kanematsu ,  Takayuki Gomi ,  Hiroaki Anmo ,  Takashi Noguchi ,  Katsuyuki Kato ,  Hirokazu Ejiri ,  Norikazu Ouchi

IPC: H01L21/331 ,  H01L29/732

CPC classification number: H01L29/7322 ,  H01L29/66272 ,  Y10S148/01 ,  Y10S148/011

Abstract: A semiconductor device and a manufacturing method therefor which can simultaneously realize both a reduction in base transit time by a reduction in base width and a reduction in base resistance by a reduction in link base resistance. The semiconductor device is manufactured by the method including the steps of forming a first impurity diffused layer of a first conduction type in a semiconductor substrate; forming a conducting film connected to the first impurity diffused layer; forming a first insulating film on the conducting film; forming a first hole through a laminated film composed of the first insulating film and the conducting film; forming a second impurity diffused layer of the first conduction type in the semiconductor substrate exposed to the first hole; forming a side wall from a second insulating film in the first hole to form a second hole; and forming a third impurity diffused layer of the first conduction type in the semiconductor substrate exposed to the second hole.

Abstract translation: 一种半导体器件及其制造方法，其可以通过减小基极宽度同时实现基极通过时间的减少，并且通过降低基极电阻降低基极电阻。 半导体器件通过包括以下步骤的方法制造：在半导体衬底中形成第一导电类型的第一杂质扩散层; 形成连接到第一杂质扩散层的导电膜; 在导电膜上形成第一绝缘膜; 通过由第一绝缘膜和导电膜构成的层压膜形成第一孔; 在暴露于第一孔的半导体衬底中形成第一导电类型的第二杂质扩散层; 从所述第一孔中的第二绝缘膜形成侧壁以形成第二孔; 以及在暴露于第二孔的半导体衬底中形成第一导电类型的第三杂质扩散层。

公开(公告)号：US5828084A

公开(公告)日：1998-10-27

申请号：US411203

申请日：1995-03-27

Applicant: Takashi Noguchi ,  Rafael Reif ,  Julie Tsai ,  Andrew J. Tang

Inventor： Takashi Noguchi ,  Rafael Reif ,  Julie Tsai ,  Andrew J. Tang

IPC: H01L21/20 ,  H01L21/336 ,  H01L29/786 ,  H01L29/04 ,  H01L29/76

CPC classification number: H01L29/66742 ,  H01L29/78675 ,  H01L29/78678 ,  H01L29/78684 ,  Y10S438/933

Abstract: The present invention pertains to a high-performance thin film transistor having a gate and an active region, whose active region comprises a poly-Si.sub.1 -.sub.x Ge.sub.x alloy material and a channel layer of silicon, in which the channel layer of silicon is interposed between the poly-Si.sub.1-x Ge.sub.x alloy material and the gate, and a method for fabricating such a high-performance thin film transistor.

Abstract translation: 本发明涉及一种具有栅极和有源区的高性能薄膜晶体管，其有源区包括多晶Si1-xGex合金材料和硅沟道层，其中沟道层硅介于 多晶Si1-xGex合金材料和栅极，以及制造这种高性能薄膜晶体管的方法。