Abstract:
A liquid crystal display is provided. The liquid crystal display includes a first panel, a second panel facing and separated from the first panel, a liquid crystal layer interposed between the first and second panels, a plurality of variable capacitors that vary capacitance thereof by pressure, and a plurality of reference capacitors formed on the second panel and connected to the variable capacitors.
Abstract:
A shift register and a display device having the shift register are provided. The shift register has a plurality of stages which sequentially generate output signals in synchronization with a plurality of clock signals. Each of the stages includes an input unit for receiving a scan start signal or an output signal from a previous stage and outputting the scan start signal or the output signal as a first voltage, a first unit for passing at least two clock signals, a second unit for outputting at least one of the at least two clock signals or a second voltage in response to an output signal from a next stage, and an output unit for generating an output signal synchronized with at least one of the at least two clock signals in response to the outputs of the input unit and the second unit.
Abstract:
A display device according to an embodiment of the present invention includes a display panel having a first display area and a second display area. The display panel includes: a plurality of first display circuits disposed in the first display area; a plurality of second display circuits disposed in the second display area; and a plurality of touch sensing circuits disposed in the second display area.
Abstract:
A display device is provided, which includes: a display panel unit; a first sensor formed on the display panel unit and generating a first sensing signal based on an external light; and a second sensor formed on the display panel unit and generating a second sensing signal in response to a touch.
Abstract:
A shift register includes a plurality of stages each generating an output signal in sequence and including a buffering section, a driving section, a first charging section, and a charging control section. The buffering section receives one of a scan start signal and an output signal of a previous stage so that the driving section generates the output signal of a present stage. The first charging section includes a first terminal electrically connected to the driving section and a second terminal electrically connected to a first source voltage. The charging control section applies the output signal of a next stage to the first charging section. Therefore, a gradual failure of TFT is reduced.
Abstract:
An information detection device according to an embodiment of the present invention includes: light sensing units generating photocurrents according to light amount and outputting sensor data signals based on the photocurrent; sensor scanning lines receiving sensor scanning signals from a sensor scanning driver and controlling the output of the sensor data signals from the light sensing units; sensor data lines transmitting the sensor data signals from the light sensing units; and a sensing signal processor receiving the sensor data signals from the sensor data lines at input terminals, wherein the number of the input terminals of the sensing signal processor is less than the number of the sensor data lines.
Abstract:
A data line and an amorphous silicon pattern are formed on a substrate. The first electrode pattern is extended from the data line and overlaps an edge of the amorphous silicon pattern. The second electrode pattern is made of the same metal as the first electrode pattern and overlaps the edge of the amorphous silicon pattern at an opposite side of the first electrode pattern. Edges of the first and the second electrode patterns are sharply formed so that a tunneling effect easily occurs through the amorphous silicon pattern. An indium-tin-oxide pattern for a capacitor is formed at the end of the second electrode pattern. The capacitor is formed between the ITO pattern and a common electrode.
Abstract:
A method for manufacturing a polysilicon thin film transistor (TFT) according to the present invention reduces the electric field near the drain junction by varying partially the thickness of a gate insulating layer through a post oxide process. A polysilicon layer is patterned to become an active layer and a chemical vapor deposition oxide film deposited. By thermal oxidation a thermal oxide film is formed under the chemical vapor deposition oxide film. A gate electrode made of polysilicon is formed on the gate insulating layer. Thermal oxidation is performed to make the end portions of the thermal oxide film thicker than the portion under the gate electrode of the thermal oxide film. With this process, the electric field near the drain junction region is reduced and thus the leakage currents of the TFT decrease. In addition, the method in this invention is very simple compared with the conventional methods of obtaining a LDD structure and on-current is not reduced.
Abstract:
Methods of forming thin-film transistor liquid crystal display devices include the steps of forming a semiconductor active layer on a face of a transparent substrate and then forming a gate electrode insulating layer on the semiconductor active layer. The gate electrode insulating layer is then patterned to expose a first portion of the semiconductor active layer. A gate electrode is also formed on the gate electrode insulating layer, opposite the semiconductor active layer. In addition, a pixel electrode is formed to be electrically coupled to the exposed first portion of the semiconductor active layer. Preferably, the steps of forming the gate electrode and pixel electrode are performed simultaneously by forming a transparent conductive layer on the patterned gate electrode insulating layer and then patterning the transparent conductive layer to define a transparent gate electrode and a transparent pixel electrode. The transparent conductive layer may comprise a material selected from the group consisting of indium tin oxide (ITO) and zinc oxide (ZnO). Dopants of first conductivity type are also preferably implanted into the semiconductor active layer, using the gate electrode and the pixel electrode as an implant mask, and then a laser annealing step is performed to recrystallize the channel portion of the active layer and activate the dopants in the source and drain regions.