Refresh controlling circuit
    81.
    发明申请
    Refresh controlling circuit 有权
    刷新控制电路

    公开(公告)号:US20090109783A1

    公开(公告)日:2009-04-30

    申请号:US12005478

    申请日:2007-12-27

    Applicant: Sang Kwon Lee

    Inventor: Sang Kwon Lee

    Abstract: A refresh controlling circuit includes an MRS latch unit configured to output a mask information signal of a bank and a mask information signal of a segment by synchronizing a first address signal and a second address signal with a pulse signal, a bank active control unit configured to output a bank active signal in response to the mask information signal of the bank, and a decoding unit configured to output a row address decoding signal in response to the bank active signal, the mask information signal of the segment, and a third address signal.

    Abstract translation: 刷新控制电路包括:MRS锁存单元,被配置为通过使第一地址信号和第二地址信号与脉冲信号同步来输出存储体的掩码信息信号和段的掩码信息信号;存储体活动控制单元,被配置为 响应于存储体的掩模信息信号输出存储体活动信号,以及解码单元,被配置为响应于存储体活动信号,区段的掩模信息信号和第三地址信号输出行地址解码信号。

    METHOD AND APPARATUS FOR TRANSMITTING DATA IN A PEER-TO-PEER NETWORK
    82.
    发明申请
    METHOD AND APPARATUS FOR TRANSMITTING DATA IN A PEER-TO-PEER NETWORK 有权
    用于在对等网络中传输数据的方法和装置

    公开(公告)号:US20080256175A1

    公开(公告)日:2008-10-16

    申请号:US11865585

    申请日:2007-10-01

    Abstract: An apparatus for transmitting data which includes a management unit that manages network-topology information of clients participating in the P2P service, and an interface unit that provides to a first client a peer list including information of a client having the minimum network distance to the first client, based on the network topology information, when receiving a request for content from the first client.

    Abstract translation: 一种用于发送数据的装置,包括:管理参与P2P服务的客户端的网络拓扑信息的管理单元;以及接口单元,向第一客户端提供包括具有到第一 客户端,当从第一客户端接收到对内容的请求时,基于网络拓扑信息。

    Column path circuit
    83.
    发明授权
    Column path circuit 有权
    列路径电路

    公开(公告)号:US07428186B2

    公开(公告)日:2008-09-23

    申请号:US11275595

    申请日:2006-01-18

    Applicant: Sang Kwon Lee

    Inventor: Sang Kwon Lee

    Abstract: A column path circuit includes address transition detectors which detect level transition of page address signals, thereby outputting transition detection signals each having a predetermined enable period, respectively. A detection signal coupler logically operates on the transition detection signals respectively outputted from the address transition detectors, and outputs a signal representing the results of the logical operation. A ready signal generator outputs a strobe ready signal having a predetermined enable period in response to an enabled state of the signal outputted from the detection signal coupler. A strobe signal generator generates a read strobe signal and a page address strobe signal for latch of the page address signals in response to the strobe ready signal. Page address buffers are enabled by the page address strobe signal, and latch the page address signals, thereby buffering the page address signals, a page address decoder which decodes the buffered page address signals respectively outputted from the page address buffers. And, a column selection signal generator outputs column selection signals respectively corresponding to the decoded page address signals in response to the read strobe signal.

    Abstract translation: 列路径电路包括地址转换检测器,其检测寻呼地址信号的电平转换,从而分别输出具有预定使能周期的转移检测信号。 检测信号耦合器对从地址转换检测器分别输出的转移检测信号进行逻辑运算,并输出表示逻辑运算结果的信号。 就绪信号发生器响应于从检测信号耦合器输出的信号的使能状态而输出具有预定使能周期的选通准备信号。 选通信号发生器响应于选通准备就绪信号而产生读选通信号和页寻址选通信号,用于锁存页地址信号。 页面地址选通信号使能页面地址缓冲器,并锁存页面地址信号,从而缓冲页面地址信号,对从页面地址缓冲器分别输出的缓冲页面地址信号进行解码的页面地址解码器。 并且,列选择信号发生器响应于读选通信号输出分别对应于解码页地址信号的列选择信号。

    METHOD AND APPARATUS FOR RELAYING STREAMING DATA
    84.
    发明申请
    METHOD AND APPARATUS FOR RELAYING STREAMING DATA 审中-公开
    用于中继流数据的方法和装置

    公开(公告)号:US20080209054A1

    公开(公告)日:2008-08-28

    申请号:US11841065

    申请日:2007-08-20

    Abstract: Provided are a method and apparatus for relaying streaming data between peers including a first device and a second device in a peer-to-peer (P2P) overlay network. A method of relaying streaming data from the first device to the second device includes determining whether requested streaming data is streaming data that the first device is currently receiving when the first device is requested by the second device to relay streaming data to the second device. Then, the first device assigns a reception bandwidth for receiving the requested streaming data from a source device according to the determination result and receives the requested streaming data using the assigned reception bandwidth to relay the requested streaming data to the second device. Therefore, peers can receive streaming data at a high rate in a P2P network.

    Abstract translation: 提供了一种用于在包括对等(P2P)覆盖网络中的第一设备和第二设备的对等体之间中继流数据的方法和装置。 将流数据从第一设备中继到第二设备的方法包括:当第二设备请求第一设备以将流数据中继到第二设备时,确定所请求的流数据是否是第一设备当前正在接收的流数据。 然后,第一设备根据确定结果分配用于从源设备接收所请求的流数据的接收带宽,并使用分配的接收带宽接收所请求的流数据,以将所请求的流数据中继到第二设备。 因此,对等体可以在P2P网络中以高速率接收流数据。

    CONTENTS SERVICE APPARATUS AND METHOD
    85.
    发明申请
    CONTENTS SERVICE APPARATUS AND METHOD 审中-公开
    目录服务设备和方法

    公开(公告)号:US20080091615A1

    公开(公告)日:2008-04-17

    申请号:US11775285

    申请日:2007-07-10

    CPC classification number: H04L9/0891 G06Q20/3829 H04L2209/56 H04L2209/60

    Abstract: A method, apparatus, and system for intermediating contents service. The method includes changing at least part of contents to produce a plurality of pieces of changed key data which are different from each other; and managing trading of the contents between a first and a second device using the produced plurality of pieces of changed key data. The apparatus includes a contents publishing unit which changes at least part of contents, produces a plurality of pieces of changed key data which are different from each other, and stores information on the plurality of pieces of changed key data in a storage unit; and a trade managing unit which manages trading of the contents between a first device and a second device using the stored information on the plurality of pieces of changed key data. The system includes a contents service intermediating server, and first and second devices for trading contents.

    Abstract translation: 一种用于中介内容服务的方法,装置和系统。 该方法包括改变至少部分内容以产生彼此不同的多个改变的密钥数据; 以及使用所生成的多个改变的密钥数据来管理第一和第二设备之间的内容的交易。 该装置包括内容发布单元,其改变至少部分内容,产生彼此不同的多个改变的密钥数据,并将关于多个改变的密钥数据的信息存储在存储单元中; 以及交易管理单元,其使用所存储的关于所述多个改变的密钥数据的信息来管理第一设备和第二设备之间的内容的交易。 该系统包括内容服务中介服务器,以及用于交易内容的第一和第二设备。

    Internal power supply voltage generating circuit with reduced leakage current in standby mode
    86.
    发明授权
    Internal power supply voltage generating circuit with reduced leakage current in standby mode 有权
    内部电源电压发生电路在待机模式下具有降低的漏电流

    公开(公告)号:US07298664B2

    公开(公告)日:2007-11-20

    申请号:US11304621

    申请日:2005-12-16

    Applicant: Sang Kwon Lee

    Inventor: Sang Kwon Lee

    CPC classification number: G05F1/465 G11C11/417

    Abstract: An internal power supply voltage generating circuit of semiconductor memory devices configured such that only a predetermined internal power driver is driven but the remaining internal power drivers are not driven, in a standby mode so that the leakage current in standby mode is reduced and the standby current is thus reduced. Furthermore, the leakage current of an internal power driver that does not operate in the standby mode is reduced using a high voltage as a back bias of the internal power driver.

    Abstract translation: 半导体存储器件的内部电源电压产生电路被配置成在待机模式下仅驱动预定的内部功率驱动器而不驱动剩余的内部电源驱动器,使得待机模式下的漏电流降低,并且待机电流 因此减少。 此外,使用高电压作为内部功率驱动器的反向偏压来减小不工作在待机模式的内部功率驱动器的漏电流。

    Pseudo SRAM having combined synchronous and asynchronous mode register set
    87.
    发明授权
    Pseudo SRAM having combined synchronous and asynchronous mode register set 有权
    具有组合同步和异步模式寄存器组的伪SRAM

    公开(公告)号:US07120085B2

    公开(公告)日:2006-10-10

    申请号:US10878326

    申请日:2004-06-29

    Applicant: Sang Kwon Lee

    Inventor: Sang Kwon Lee

    CPC classification number: G11C11/40615 G11C7/1045 G11C11/406

    Abstract: A PSRAM features a mode register set (MRS) for setting a mode register at a combined synchronous and asynchronous mode. The PSRAM having a combined synchronous and asynchronous mode register set includes a MRS, a mode register control unit, a plurality of control signal buffers, an address buffer, a clock buffer, and a synchronous and asynchronous detecting unit. Here, the plurality of control signal buffers, the address buffer and the clock buffers are controlled by a chip selecting signal at an asynchronous mode, and are operated synchronously with respect to an internal clock outputted from the clock buffer regardless of the chip selecting signal at a synchronous mode.

    Abstract translation: PSRAM具有用于在组合同步和异步模式下设置模式寄存器的模式寄存器集(MRS)。 具有组合同步和异步模式寄存器集的PSRAM包括MRS,模式寄存器控制单元,多个控制信号缓冲器,地址缓冲器,时钟缓冲器和同步和异步检测单元。 这里,多个控制信号缓冲器,地址缓冲器和时钟缓冲器由异步模式下的芯片选择信号控制,并且相对于从时钟缓冲器输出的内部时钟同步地操作,而与芯片选择信号无关 同步模式。

Patent Agency Ranking