Error Correction Codes for Incremental Redundancy
    81.
    发明申请
    Error Correction Codes for Incremental Redundancy 有权
    增量冗余纠错码

    公开(公告)号:US20140351669A1

    公开(公告)日:2014-11-27

    申请号:US14336066

    申请日:2014-07-21

    Applicant: APPLE INC.

    Abstract: A method includes accepting input including at least part of a codeword that has been encoded by an ECC defined by a set of parity check equations. The codeword includes data bits and parity bits. A decoding process is applied to the codeword using the data bits and only a first partial subset of parity bits in the input, and using only a second partial subset of equations. Upon a failure to decode the codeword using the partial subsets, the codeword is re-decoded using the data bits and all parity bits in the input, and using all equations. The set of parity check equations is defined such that any parity bit in the codeword appears in multiple equations, and any parity bit in the first partial subset of the parity bits appears in a plurality of equations in the second partial subset of the equations.

    Abstract translation: 一种方法包括接受输入,该输入包括已由由奇偶校验方程组确定的ECC编码的码字的至少一部分。 码字包括数据位和奇偶校验位。 使用数据位和仅输入中的奇偶校验位的第一部分子集,并且仅使用方程的第二部分子集,将解码处理应用于码字。 在使用部分子集解码码字失败时,使用输入中的数据位和所有奇偶校验位,并使用所有方程对码字进行重新解码。 定义奇偶校验方程组,使得码字中的任何奇偶校验位出现在多个等式中,并且奇偶校验位的第一部分子集中的任何奇偶校验位出现在等式的第二部分子集中的多个等式中。

    DATA STORAGE IN ANALOG MEMORY CELLS ACROSS WORD LINES USING A NON-INTEGER NUMBER OF BITS PER CELL
    82.
    发明申请
    DATA STORAGE IN ANALOG MEMORY CELLS ACROSS WORD LINES USING A NON-INTEGER NUMBER OF BITS PER CELL 审中-公开
    数据存储在模拟记忆体细胞中,使用非整数个单位数的字线

    公开(公告)号:US20140347924A1

    公开(公告)日:2014-11-27

    申请号:US14318876

    申请日:2014-06-30

    Applicant: Apple Inc.

    Abstract: A method for data storage includes accepting data for storage in an array of analog memory cells, which are arranged in rows associated with respective word lines. At least a first page of the data is stored in a first row of the array, and at least a second page of the data is stored in a second row of the array, having a different word line from the first row. After storing the first and second pages, a third page of the data is stored jointly in the first and second rows.

    Abstract translation: 一种用于数据存储的方法包括接收用于存储在与相应字线相关联的行中的模拟存储器单元阵列中的数据。 数据的至少第一页被存储在阵列的第一行中,并且数据的至少第二页被存储在阵列的第二行中,具有与第一行不同的字线。 在存储第一页和第二页之后,数据的第三页共同存储在第一行和第二行中。

    Efficient Re-read Operations in Analog Memory Cell Arrays
    83.
    发明申请
    Efficient Re-read Operations in Analog Memory Cell Arrays 审中-公开
    模拟存储器单元阵列中的高效重读操作

    公开(公告)号:US20140325308A1

    公开(公告)日:2014-10-30

    申请号:US14330203

    申请日:2014-07-14

    Applicant: Apple Inc.

    Abstract: A method for data storage includes storing data, which is encoded with an Error Correction Code (ECC), in a group of analog memory cells by writing respective first storage values to the memory cells in the group. After storing the data, respective second storage values are read from the memory cells in the group, and the read second storage values are processed so as to decode the ECC. Responsively to a failure in decoding the ECC, one or more of the second storage values that potentially caused the failure are identified as suspect storage values. Respective third storage values are re-read from a subset of the memory cells that includes the memory cells holding the suspect storage values. The ECC is re-decoded using the third storage values so as to reconstruct the stored data.

    Abstract translation: 一种用于数据存储的方法包括通过将相应的第一存储值写入组中的存储器单元来将经错误校正码(ECC)编码的数据存储在一组模拟存储器单元中。 在存储数据之后,从组中的存储器单元读取相应的第二存储值,并且处理读取的第二存储值以便对ECC进行解码。 响应于对ECC的解码失败,可​​能导致故障的一个或多个第二存储值被识别为可疑存储值。 从包含存储可疑存储值的存储单元的存储器单元的子集重新读取相应的第三存储值。 使用第三存储值对ECC进行重新解码,以重建存储的数据。

    Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N
    84.
    发明授权
    Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N 有权
    在N位/单元模拟存储单元器件中以M位/单元密度存储,M> N

    公开(公告)号:US08750046B2

    公开(公告)日:2014-06-10

    申请号:US14041219

    申请日:2013-09-30

    Applicant: Apple Inc.

    Abstract: A method for data storage includes accepting data for storage in a memory that includes multiple analog memory cells and supports a set of built-in programming commands. Each of the programming commands programs a respective page, selected from a group of N pages, in a subset of the memory cells. The subset of the memory cells is programmed to store M pages of the data, M>N, by performing a sequence of the programming commands drawn only from the set.

    Abstract translation: 一种用于数据存储的方法包括接收用于存储在包括多个模拟存储器单元的存储器中的数据,并且支持一组内置的编程命令。 每个编程命令在存储器单元的子集中编写从一组N页中选择的相应页面。 存储器单元的子集被编程为通过执行仅从集合中绘制的编程命令的序列来存储数据的M页M> N。

    Programming Schemes for Multi-Level Analog Memory Cells
    85.
    发明申请
    Programming Schemes for Multi-Level Analog Memory Cells 审中-公开
    多级模拟存储单元的编程方案

    公开(公告)号:US20140157090A1

    公开(公告)日:2014-06-05

    申请号:US14173965

    申请日:2014-02-06

    Applicant: Apple Inc.

    Abstract: A method for data storage includes storing first data bits in a set of multi-bit analog memory cells at a first time by programming the memory cells to assume respective first programming levels. Second data bits are stored in the set of memory cells at a second time that is later than the first time by programming the memory cells to assume respective second programming levels that depend on the first programming levels and on the second data bits. A storage strategy is selected responsively to a difference between the first and second times. The storage strategy is applied to at least one group of the data bits, selected from among the first data bits and the second data bits.

    Abstract translation: 一种用于数据存储的方法包括:通过对存储器单元进行编程来采用各自的第一编程级别,来将第一数据位在第一时间存储在一组多位模拟存储单元中。 第二数据位通过对存储器单元进行编程以采取依赖于第一编程电平和第二数据位的相应的第二编程电平而在比第一时间晚的第二时间存储在存储单元组中。 响应于第一次和第二次之间的差异选择存储策略。 将存储策略应用于从第一数据位和第二数据位中选择的至少一组数据位。

    DATA STORAGE IN ANALOG MEMORY CELLS USING A NON-INTEGER NUMBER OF BITS PER CELL
    86.
    发明申请
    DATA STORAGE IN ANALOG MEMORY CELLS USING A NON-INTEGER NUMBER OF BITS PER CELL 有权
    数据存储在模拟记忆体细胞中使用非整数个位数每个细胞

    公开(公告)号:US20140119089A1

    公开(公告)日:2014-05-01

    申请号:US14147714

    申请日:2014-01-06

    Applicant: Apple Inc.

    Abstract: A method for data storage includes, in a first programming phase, storing first data in a group of analog memory cells by programming the memory cells in the group to a set of initial programming levels. In a second programming phase that is subsequent to the first programming phase, second data is stored in the group by: identifying the memory cells in the group that were programmed in the first programming phase to respective levels in a predefined partial subset of the initial programming levels; and programming only the identified memory cells with the second data, so as to set at least some of the identified memory cells to one or more additional programming levels that are different from the initial programming levels.

    Abstract translation: 一种用于数据存储的方法包括在第一编程阶段通过将该组中的存储器单元编程为一组初始编程级别来将第一数据存储在一组模拟存储器单元中。 在第一编程阶段之后的第二编程阶段,通过以下方式将第二数据存储在组中:将在第一编程阶段中编程的组中的存储器单元识别为初始编程的预定义部分子集中的相应电平 水平; 以及仅使用所述第二数据来编程所识别的存储器单元,以便将所识别的存储器单元中的至少一些设置为与所述初始编程级别不同的一个或多个附加编程级别。

    HIGH-PERFORMANCE ECC DECODER
    87.
    发明申请

    公开(公告)号:US20130283133A1

    公开(公告)日:2013-10-24

    申请号:US13920140

    申请日:2013-06-18

    Applicant: Apple Inc.

    Abstract: Methods for Error Correction Code (ECC) decoding include producing syndromes from a set of bits, which represent data that has been encoded with the ECC. An Error Locator Polynomial (ELP) is generated based on the syndromes. At least some of the ELP roots are identified, and the errors indicated by these roots are corrected. Each syndrome may be produced by applying to the bits vector operations in a vector space. Each syndrome is produced by applying vector operations using a different basis of the vector space. The ELP may be evaluated on a given field element by operating on ELP coefficients using serial multipliers, wherein each serial multiplier performs a sequence of multiplication cycles and produces an interim result in each cycle. Responsively to detecting at least one interim result indicating that the given element is not an ELP root, the multiplication cycles are terminated before completion of the sequence.

    Error Correction Coding Over Multiple Memory Pages
    88.
    发明申请
    Error Correction Coding Over Multiple Memory Pages 审中-公开
    多个内存页面上的错误校正编码

    公开(公告)号:US20130283122A1

    公开(公告)日:2013-10-24

    申请号:US13921446

    申请日:2013-06-19

    Applicant: Apple Inc.

    CPC classification number: H03M13/29 G06F11/1012 G11C29/00 G11C2029/1804

    Abstract: A method for data storage includes encoding each of multiple data items individually using a first Error Correction Code (ECC) to produce respective encoded data items. The encoded data items are stored in a memory. The multiple data items are encoded jointly using a second ECC, so as to produce a code word of the second ECC, and only a part of the code word is stored in the memory. The stored encoded data items are recalled from the memory and the first ECC is decoded in order to reconstruct the data items. Upon a failure to reconstruct a given data item from a respective given encoded data item by decoding the first ECC, the given data item is reconstructed based on the part of the code word of the second ECC and on the encoded data items other than the given encoded data item.

    Abstract translation: 一种用于数据存储的方法包括使用第一纠错码(ECC)分别对多个数据项中的每一个进行编码,以产生相应的编码数据项。 编码数据项存储在存储器中。 多个数据项使用第二ECC共同编码,以便产生第二ECC的代码字,并且仅一部分代码字被存储在存储器中。 存储的编码数据项被从存储器调用,并且第一ECC被解码以便重构数据项。 在通过解码第一ECC无法从相应的给定编码数据项中重建给定数据项时,基于第二ECC的代码字的部分和除了给定的编码数据项之外的编码数据项重建给定数据项 编码数据项。

    Adaptive estimation of memory cell read thresholds
    89.
    发明授权
    Adaptive estimation of memory cell read thresholds 有权
    存储单元读取阈值的自适应估计

    公开(公告)号:US08547740B2

    公开(公告)日:2013-10-01

    申请号:US13734335

    申请日:2013-01-04

    Applicant: Apple Inc.

    Abstract: A method for operating a memory (28) that includes a plurality of analog memory cells (32) includes storing data in the memory by writing first storage values to the cells. Second storage values are read from the cells, and a Cumulative Distribution Function (CDF) of the second storage values is estimated. The estimated CDF is processed so as to compute one or more thresholds. A memory access operation is performed on the cells using the one or more thresholds.

    Abstract translation: 一种用于操作包括多个模拟存储单元(32)的存储器(28)的方法包括:通过向单元写入第一存储值来将数据存储在存储器中。 从单元读取第二存储值,并且估计第二存储值的累积分布函数(CDF)。 处理估计的CDF以计算一个或多个阈值。 使用一个或多个阈值对单元执行存储器存取操作。

    Iterative decoding with early termination criterion that permits errors in redundancy part

    公开(公告)号:US20200091933A1

    公开(公告)日:2020-03-19

    申请号:US16130003

    申请日:2018-09-13

    Applicant: Apple Inc.

    Abstract: An apparatus includes an interface and a decoder. The interface is configured to receive a code word, produced in accordance with an Error Correction Code (ECC) represented by a set of parity check equations. The code word includes a data part and a redundancy part, and contains one or more errors. The decoder is configured to hold a definition of a partial subgroup of the parity check equations that, when satisfied, indicate that the data part is error-free with a likelihood of at least a predefined threshold, to decode the code word by performing an iterative decoding process on the parity check equations, so as to correct the errors, and during the iterative decoding process, to estimate whether the data part is error-free based only on the partial subgroup of the parity check equations, and if the data part is estimated to be error-free, terminate the iterative decoding process.

Patent Agency Ranking