公开(公告)号：US20210296342A1

公开(公告)日：2021-09-23

申请号：US16821818

申请日：2020-03-17

Applicant: Micron Technology, Inc.

Inventor： Shuangqiang Luo ,  Nancy M. Lomeli

IPC: H01L27/11573 ,  H01L27/11582 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11529

Abstract: A microelectronic device comprises a stack structure, a stadium structure within the stack structure, a source tier underlying the stack structure, and a masking structure. The stack structure has tiers each comprising a conductive structure and an insulating structure. The stadium structure comprises a forward staircase structure, a reverse staircase structure, and a central region horizontally interposed between the forward staircase structure and the reverse staircase structure. The source tier comprises discrete conductive structures within horizontal boundaries of the central region of the stadium structure and horizontally separated from one another by dielectric material. The masking structure is confined within the horizontal boundaries of the central region of the stadium structure and is vertically interposed between the source tier and the stack structure. The masking structure comprises segments horizontally covering portions of the dielectric material horizontally interposed between the discrete conductive structures. Additional devices and electronic systems are also described.

公开(公告)号：US20210217762A1

公开(公告)日：2021-07-15

申请号：US16743342

申请日：2020-01-15

Applicant: Micron Technology, Inc.

Inventor： Shuangqiang Luo ,  Indra V. Chary

IPC: H01L27/11556 ,  H01L27/11582 ,  H01L23/532 ,  H01L21/768

Abstract: A microelectronic device comprising a stack structure comprising a non-staircase region, a staircase region, and an array region. Each of the non-staircase region, the staircase region, and the array region comprises tiers of alternating conductive materials and dielectric materials. One or more pillars are in the non-staircase region and in the array region, and one or more supports are in the staircase region. A conductive material is in each of the non-staircase region, the staircase region, and the array region and extends vertically into a source adjacent to the tiers. The source comprises corrosion containment features in each of the non-staircase region, the staircase region, and the array region, adjacent to the conductive material in the source. Additional microelectronic devices, electronic systems, and methods are also disclosed.

公开(公告)号：US12266569B2

公开(公告)日：2025-04-01

申请号：US18416243

申请日：2024-01-18

Applicant: Micron Technology, Inc.

Inventor： John D. Hopkins ,  Shuangqiang Luo ,  Alyssa N. Scarbrough

IPC: H01L23/535 ,  H01L21/768 ,  H10B41/27 ,  H10B43/27

Abstract: Integrated circuitry comprises vertical conductive vias individually having a lower portion thereof that is directly against conductor material of islands. The islands comprise multiple different composition materials directly above the conductor material. Apart from the conductive vias, the islands individually comprise at least one of (a), (b), or (c), where: (a): a top material that is of different composition from all material that is vertically between the top material and the conductor material; (b): the top material having its top surface in a vertical cross-section extending laterally-outward beyond two opposing laterally-outermost edges of a top surface of the material that is immediately directly below the top material; and (c): is of different composition from that of an upper portion of the conductor material and including a portion thereof that is elevationally coincident with the conductor material or that is directly against the conductor material. Other embodiments, including methods, are disclosed.

公开(公告)号：US20250017007A1

公开(公告)日：2025-01-09

申请号：US18347752

申请日：2023-07-06

Applicant: Micron Technology, Inc.

Inventor： Shuangqiang Luo ,  Indra V. Chary ,  Nancy M. Lomeli ,  Xiao Li

IPC: H10B43/27 ,  H01L21/768 ,  H10B43/10 ,  H10B43/35

Abstract: A method of forming a microelectronic device includes forming a microelectronic device structure. The microelectronic device structure includes a stack structure comprising insulative structures and electrically conductive structures vertically alternating with the insulative structures, pillar structures extending vertically through the stack structure, an etch stop material vertically overlaying the stack structure, and a first dielectric material vertically overlying the etch stop material. The method further includes removing portions of the first dielectric material, the etch stop material, and an upper region of the stack structure to form a trench interposed between horizontally neighboring groups of the pillar structures, forming a liner material within the trench, and substantially filling a remaining portion of the trench with a second dielectric material to form a dielectric barrier structure.

公开(公告)号：US12127400B2

公开(公告)日：2024-10-22

申请号：US17648708

申请日：2022-01-24

Applicant: Micron Technology, Inc.

Inventor： Shuangqiang Luo ,  Indra V. Chary

IPC: H10B43/27 ,  H01L21/768 ,  H01L23/532 ,  H10B41/27

CPC classification number: H10B41/27 ,  H01L21/768 ,  H01L23/53271 ,  H10B43/27

Abstract: A microelectronic device comprising a stack structure comprising a non-staircase region, a staircase region, and an array region. Each of the non-staircase region, the staircase region, and the array region comprises tiers of alternating conductive materials and dielectric materials. One or more pillars are in the non-staircase region and in the array region, and one or more supports are in the staircase region. A conductive material is in each of the non-staircase region, the staircase region, and the array region and extends vertically into a source adjacent to the tiers. The source comprises corrosion containment features in each of the non-staircase region, the staircase region, and the array region, adjacent to the conductive material in the source. Additional microelectronic devices, electronic systems, and methods are also disclosed.

公开(公告)号：US20240250033A1

公开(公告)日：2024-07-25

申请号：US18623507

申请日：2024-04-01

Applicant: Micron Technology, Inc.

Inventor： Shuangqiang Luo ,  Lifang Xu ,  Xiao Li ,  Jivaan Kishore Jhothiraman ,  Mohad Baboli

IPC: H01L23/535 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H10B41/27 ,  H10B43/27

CPC classification number: H01L23/535 ,  H01L21/76805 ,  H01L21/76816 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76877 ,  H01L21/76895 ,  H01L23/5226 ,  H01L23/5283 ,  H10B41/27 ,  H10B43/27

Abstract: A microelectronic device comprises a stack structure comprising an alternating sequence of conductive material and insulative material arranged in tiers, and having blocks separated by dielectric slot structures. Each of the blocks comprises a stadium structure, a filled trench overlying the stadium structure, support structures extending through the filled trench and tiers of the stack structure, and dielectric liner structures covering sidewalls of the support structures. The stadium structure comprises staircase structures each having steps comprising edges of the tiers of the stack structure. The filled trench comprises a dielectric material interposed between at least two additional dielectric materials. The dielectric liner structures comprise first protrusions at vertical positions of the dielectric material, and second protrusions at vertical positions of the conductive material of the tiers of the stack structure. The second protrusions have greater horizontal dimensions than the first protrusions. Memory devices, electronic systems, and methods are also described.

公开(公告)号：US11917817B2

公开(公告)日：2024-02-27

申请号：US17125200

申请日：2020-12-17

Applicant: Micron Technology, Inc.

Inventor： Shuangqiang Luo ,  John D. Hopkins ,  Lifang Xu ,  Nancy M. Lomeli ,  Indra V. Chary ,  Kar Wui Thong ,  Shicong Wang

IPC: H10B43/50 ,  H10B41/27 ,  H01L21/768 ,  G11C5/02 ,  G11C5/06 ,  H10B43/27

CPC classification number: H10B41/27 ,  G11C5/025 ,  G11C5/06 ,  H01L21/768 ,  H10B43/27

Abstract: A microelectronic device comprises a stack structure comprising a vertically alternating sequence of conductive material and insulative material arranged in tiers. The stack structure has blocks separated from one another by first dielectric slot structures. Each of the blocks comprises two crest regions, a stadium structure interposed between the two crest regions in a first horizontal direction and comprising opposing staircase structures each having steps comprising edges of the tiers of the stack structure, and two bridge regions neighboring opposing sides of the stadium structure in a second horizontal direction orthogonal to the first horizontal direction and having upper surfaces substantially coplanar with upper surfaces of the two crest regions. At least one second dielectric slot structure is within horizontal boundaries of the stadium structure in the first horizontal direction and partially vertically extends through and segmenting each of the two bridge regions. Memory devices, electronic systems, and methods of forming microelectronic devices are also described.

公开(公告)号：US11910598B2

公开(公告)日：2024-02-20

申请号：US17816299

申请日：2022-07-29

Applicant: Micron Technology, Inc.

Inventor： Shuangqiang Luo ,  Indra V. Chary ,  Justin B. Dorhout

IPC: H10B41/27 ,  G11C5/02 ,  H01L23/00 ,  H01L23/538 ,  H01L21/768 ,  G11C5/06 ,  H10B43/27

CPC classification number: H10B41/27 ,  G11C5/025 ,  G11C5/06 ,  H01L21/76838 ,  H01L23/5386 ,  H01L24/14 ,  H10B43/27

Abstract: A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, the tiers individually comprising one of the conductive structures and one of the insulative structures, first support pillar structures extending through the stack structure within a first region of the microelectronic device, the first support pillar structures electrically isolated from a source structure underlying the stack structure, second support pillar structures extending through the stack structure within a second region of the microelectronic device, the second support pillar structures comprising an electrically conductive material in electrical communication with the source structure, and bridge structures extending between at least some neighboring first support pillar structures of the first support pillar structures. Related memory devices, electronic systems, and methods are also described.

公开(公告)号：US11889691B2

公开(公告)日：2024-01-30

申请号：US17211580

申请日：2021-03-24

Applicant: Micron Technology, Inc.

Inventor： Shuangqiang Luo ,  Dong Wang ,  Rui Zhang ,  Da Xing ,  Xiao Li ,  Pei Qiong Cheung ,  Xiao Zeng

IPC: H10B43/27 ,  H10B41/27 ,  H10B41/40 ,  H10B43/40

CPC classification number: H10B43/27 ,  H10B41/27 ,  H10B41/40 ,  H10B43/40

Abstract: Some embodiments include an assembly having conductive structures distributed along a level within a memory array region and another region proximate the memory array region. The conductive structures include a first stack over a metal-containing region. A semiconductor material is within the first stack. A second stack is over the conductive structures, and includes alternating conductive tiers and insulative tiers. Cell-material-pillars are within the memory array region. The cell-material-pillars include channel material. The semiconductor material directly contacts the channel material. Conductive post structures are within the other region. Some of the conductive post structures are dummy structures and have bottom surfaces which are entirely along an insulative oxide material. Others of the conductive post structures are live posts electrically coupled with CMOS circuitry. Some embodiments include methods of forming assemblies.

公开(公告)号：US20230395150A1

公开(公告)日：2023-12-07

申请号：US18327846

申请日：2023-06-01

Applicant: Micron Technology, Inc.

Inventor： Rui Zhang ,  Shuangqiang Luo ,  Mohad Baboli ,  Rajasekhar Venigalla

IPC: G11C16/04 ,  H10B41/35 ,  H10B41/27 ,  H10B43/27 ,  H10B43/35 ,  H01L23/522 ,  H01L23/528 ,  H01L21/768

CPC classification number: G11C16/0483 ,  H10B41/35 ,  H10B41/27 ,  H10B43/27 ,  H10B43/35 ,  H01L23/5226 ,  H01L23/5283 ,  H01L21/76831

Abstract: A microelectronic device includes a stack structure including blocks separated from one another by dielectric slot structures and each including a vertically alternating sequence of conductive structures and insulative structures arranged in tiers. The blocks including a stadium structure including opposing staircase structures each having steps comprising edges of the tiers. The blocks further include a filled trench vertically overlying and within horizontal boundaries of the stadium structure. The filled trench includes dielectric liner structures and additional dielectric liner structures having a different material composition than that of the dielectric liner structures and alternating with the dielectric liner structures. The filled trench also includes dielectric fill material overlying an alternating sequence of the dielectric liner structures and additional dielectric liner structures.