Abstract:
A transmitter includes a dual mode modulator and an amplifier coupled to the dual mode modulator. The dual mode modulator implements a linear modulation scheme during a first mode of the modulator to produce a variable envelope modulated signal. The dual mode modulator implements a non-linear modulation scheme during a second mode of the modulator to produce a constant envelope modulated signal. The amplifier is biased as a linear amplifier during the first mode of the modulator and is biased as a non-linear amplifier during the second mode of the modulator. A feed-forward connection between the dual mode modulator and the amplifier is used to indicate a change in modulation mode and to adjust the bias of the amplifier. A power of the constant envelope modulated signal is increased such that an operating point of the amplifier remains substantially constant during the first and second modes of the modulator.
Abstract:
A transmitter includes a dual mode modulator and an amplifier coupled to the dual mode modulator. The dual mode modulator implements a linear modulation scheme during a first mode of the modulator to produce a variable envelope modulated signal. The dual mode modulator implements a non-linear modulation scheme during a second mode of the modulator to produce a constant envelope modulated signal. The amplifier is biased as a linear amplifier during the first mode of the modulator and is biased as a non-linear amplifier during the second mode of the modulator. A feed-forward connection between the dual mode modulator and the amplifier is used to indicate a change in modulation mode and to adjust the bias of the amplifier. A power of the constant envelope modulated signal is increased such that an operating point of the amplifier remains substantially constant during the first and second modes of the modulator.
Abstract:
An automatic gain control device includes an amplifier for a reception signal, a signal processing unit, a memory, and a control unit. The amplifier can set a gain. The signal processing unit extracts control data from an output from the amplifier and performs information processing for the data. The memory stores the gain setting value of the amplifier. The control unit controls the gain of the amplifier in accordance with a preset control algorithm. On the basis of the result obtained when the control unit computes a gain setting value stored in the memory in accordance with a preset algorithm, the control unit controls the gain of the amplifier in correspondence with operation of switching the frequency of a reception signal, which is accompanied by different frequency monitoring in the compressed mode by the signal processing unit. A radio communication terminal, a control method for an automatic gain control device, a control program for an automatic gain control device, an automatic gain control method, a radio communication system, and a radio communication method are also disclosed.
Abstract:
Disclosed is a method for controlling power level of received signal in an ultra wide band transmission system which uses multi frequency bands, and includes a pre-gain controller (PGC) and a voltage gain amplifier (VGA). The method for controlling a power level of a received signal includes the steps of: a) at the PGCs, detecting which multi frequency band is used in a transmitter of the transmission system; b) at the PGCs, obtaining the voltage gain owing to the discrepancy in the power levels of the received signals; and c) at the PGCs, compensating for the power loss based on the voltage gain.
Abstract:
Methods and systems for processing signals are disclosed herein. In one aspect of the invention a circuit for processing signals may comprise a triple well (TW) NMOS transistor coupled to an amplifier core. The TW NMOS transistor may track process and temperature variations (PVT) of at least one NMOS transistor within the amplifier core. A drain of the TW NMOS transistor may be coupled to a first inductor and the first inductor may be coupled to a first voltage source. The first voltage source may generate a standard voltage of about 1.2V. A source of the TW NMOS transistor may be coupled to a second inductor and the second inductor may be coupled to the first voltage source. A gate of the TW NMOS transistor may be coupled to a second voltage source, where the second voltage source may generate a standard voltage of about 2.5V.
Abstract:
An object of the invention is to provide a transmitter high in efficiency, good in linearity and capable of covering an output level in a wide range. Either linear operating mode or saturation operating mode is set as the operating mode of a high-frequency power amplifier (15) on the basis of an operating mode set signal (107). The gain of a variable gain amplifier (14) provided in front of the high-frequency power amplifier (15) and values of output voltage (109) and bias current supplied from a supply voltage/bias current control circuit (17) to the high-frequency power amplifier (15) are switched. The gain of the variable gain amplifier (14) in the saturation operating mode is formed so as to be higher by a predetermined value than that in the linear operating mode. Accordingly, the high-frequency power amplifier 15 operates in the designated operating mode, so that the output transmission power range can be widened.
Abstract:
A method of varying the gain of an amplifier and an amplifier array are provided. The amplifier array includes two or more amplifier stages (201, 202) connected in parallel with each amplifier stage having a gain control means. Input signal means (203, 204) are provided for each amplifier stage with the input signals of the amplifier stages being of different amplitude. Means for enabling and disabling an amplifier stage (216) are provided and means for summing the outputs of the enabled amplifier stages obtain an output signal (212). The gain of the amplifier array has a range from a low gain setting with a first amplifier stage (202) enabled, through increasing gain settings as the gain of the first amplifier stage is increased from a minimum to a maximum gain, a second amplifier stage (201) can then be enabled in addition to the first amplifier stage and the gain of the second amplifier stage increased from a minimum to a maximum gain, further amplifier stages are enabled as available up to a maximum gain setting for the amplifier array. Each amplifier stage that is enabled has a decreasingly attenuated input signal and a final amplifier stage to be enabled has a full input signal (203).
Abstract:
An amplifier having programmable operational characteristics and a serial communications interface are fabricated on an integrated circuit (IC). The serial communications interface controls the operational characteristics, e.g., gain, frequency response, etc., of the amplifier. A multiplexer (MUX) may also be included on the IC and may be controlled by the serial communications interface. Status of the amplifier may also be obtained through the serial communications interface. The pin count of the IC package may be kept to a minimum by using the serial communications interface.
Abstract:
In a slot format of a received signal, AGC gain update timings (t1 to t4) are shifted every time to disperse and reduce an influence of a noise attributable to a direct current component specific to direct conversion which is accompanied by AGC gain update. In particular, in the case where each of slots in the received signal includes an information portion (data) having a larger code correcting capability and an information portion having a smaller code correcting capability (TPC (transmission power control), TFCI (transport format combination indicator), PILOT), the AGC gain update timing is generated while being shifted in the former information portion, thereby reduce the influence of the noise. When the amount of shift of the AGC gain update timing is set to be larger than that of one symbol of the received signal, the influence of the noise accompanied by the AGC gain update is further reduced.
Abstract:
The present invention provides a switchable gain amplifier comprising a high-pass filter pole. The switchable gain amplifier comprises first and second input nodes for receiving first and second components of a differential input signal. A first input terminal of a first differential amplifier is coupled to the first input node, and a first input terminal of a second differential amplifier is coupled to the second input node. A first variable resistance is coupled between the first input terminal of the first differential amplifier and a second input terminal of the first differential amplifier. A second variable resistance is coupled between the first input terminal of the second differential amplifier and a second input terminal of the second differential amplifier. A differential capacitor is coupled between the second input terminal of the first differential amplifier and the second input terminal of the second differential amplifier.