Plated wire memory
    1.
    发明授权
    Plated wire memory 失效
    电镀线存储器

    公开(公告)号:US3906467A

    公开(公告)日:1975-09-16

    申请号:US36022773

    申请日:1973-05-14

    CPC classification number: H01F10/06

    Abstract: A plated wire memory according to the present disclosure includes a barrier layer disposed between a core of non-magnetic conductive material and an outer layer of highly permeable magnetic material, such as permalloy. The barrier layer is constructed of a conductive material which will not diffuse into the outer magnetic layer, an example of such material being gold or gold-copper alloy.

    Abstract translation: 根据本公开的镀覆线存储器包括设置在非磁性导电材料的芯和高度可渗透的磁性材料的外层之间的阻挡层,例如坡莫合金。 阻挡层由不会扩散到外磁性层中的导电材料构成,这种材料的实例是金或铜 - 铜合金。

    Binary data manipulation network having multiple function capability for computers
    2.
    发明授权
    Binary data manipulation network having multiple function capability for computers 失效
    具有计算机多功能的二进制数据操作网络

    公开(公告)号:US3906459A

    公开(公告)日:1975-09-16

    申请号:US47553374

    申请日:1974-06-03

    CPC classification number: G06F7/764 G06F9/30018

    Abstract: The present invention is a binary data manipulation network comprising a pair of mask generation networks in a configuration which controls a merge network to allow a first operand to be manipulated by insertion of selected bits from a second operand at a selected position. Each mask generation network produces a result operand consisting of a group of binary ones adjacent to a group of binary zeroes where the break point between ones and zeroes is determined by an input count operand. The two mask generation networks are connected to the merge network in end for end fashion so that, typically, the merge network gates the bits of the first operand as the result operand when the mask generation network result operands are dissimilar and gates the bits of the second operand when the bits of the mask generation network result operands are similar. The apparatus of the present invention also performs other related operations using the network configuration disclosed.

    Abstract translation: 本发明是一种二进制数据操作网络,其包括一对配置中的掩码生成网络,该配置控制合并网络以允许通过在选定位置插入来自第二操作数的选定位来操纵第一操作数。 每个掩码生成网络产生一个结果操作数,该结果操作数由邻近一组二进制零的二进制数组组成,其中一个和零之间的断点由输入计数操作数确定。 两个掩码生成网络以端到端方式连接到合并网络,使得当掩码生成网络结果操作数不相似时,通常合并网络将第一操作数的位作为结果操作数进行门控,并且对 当掩码生成网络结果操作数的位相似时,第二操作数。 本发明的装置还使用所公开的网络配置来执行其他相关操作。

    Demand driven multiplexing system
    3.
    发明授权
    Demand driven multiplexing system 失效
    需求驱动复用系统

    公开(公告)号:US3904829A

    公开(公告)日:1975-09-09

    申请号:US50667374

    申请日:1974-09-16

    CPC classification number: H04M9/025 H04L12/423

    Abstract: A demand driven multiplexing system is provided having first and second closed-loop communications links, each connected to a central control station and to a plurality of serially-arranged remote stations. The central station includes means adapted to issue an end-of-batch code on one link and each remote station includes means responsive to the end-of-batch code to remove the same from any data train on the link and insert a message thereon, followed by the end-of-batch code. The central station also issues data trains on the other link, each data group having an address code. Each remote station is responsive to the address code to copy the particular data group from the link.

    Abstract translation: 提供具有第一和第二闭环通信链路的需求驱动复用系统,每个连接到中央控制站和多个串行排列的远程站。 中心站包括适于在一个链路上发出批次结束代码的装置,并且每个远程站包括响应于批次结束代码以从链路上的任何数据列移除相同的装置并在其上插入消息的装置, 之后是批次结束代码。 中心站还在另一个链路上发布数据列,每个数据组都有一个地址码。 每个远程站响应于地址代码从该链接复制特定的数据组。

    Phase locking circuits utilizing bridge controlled clock with feedback
    4.
    发明授权
    Phase locking circuits utilizing bridge controlled clock with feedback 失效
    利用具有反馈的桥接控制时钟的锁相电路

    公开(公告)号:US3903473A

    公开(公告)日:1975-09-02

    申请号:US46300874

    申请日:1974-04-22

    Inventor: FOSTER RAYMOND F

    CPC classification number: H03L7/085

    Abstract: Apparatus is provided for producing pulses synchronous with the phase and frequency of an unregulated alternating signal. An electrical bridge is provided having a pair of rectifiers and a pair of impedance devices forming the legs thereof. The unregulated signal is applied to the junction between the diodes and voltage-controlled clock means is connected to the junction between the impedance devices. The clock drives logic which provides positive and negative pulse train outputs whose rates are dependent upon the signal from the bridge, and returns the pulse trains to opposite sides of the bridge. If the pulse trains are out of frequency with the unregulated signal, the bridge becomes unbalanced in such a manner as to alter the frequency rate of the clock.

    Abstract translation: 提供了用于产生与未调节的交变信号的相位和频率同步的脉冲的装置。 提供了具有一对整流器和形成其腿部的一对阻抗器件的电桥。 未调节的信号被施加到二极管之间的结点,并且压控时钟装置连接到阻抗器件之间的结。 时钟驱动逻辑,其提供正和负脉冲串输出,其速率取决于来自桥的信号,并且将脉冲序列返回到桥的相对侧。 如果脉冲串与未调节的信号超出频率,则桥变得不平衡,以改变时钟的频率。

    Plasma display panel drive apparatus
    5.
    发明授权
    Plasma display panel drive apparatus 失效
    等离子显示面板驱动装置

    公开(公告)号:US3894506A

    公开(公告)日:1975-07-15

    申请号:US44575474

    申请日:1974-02-25

    CPC classification number: G09G3/282 G09G2310/0267

    Abstract: A system of driving a plasma display panel is disclosed using a pair of independently driven impedance devices coupled to each horizontal and vertical drive line and which requires a source of direct current operating through electronic switching devices associated with each impedance device to form a distributed driver matrix selection scheme for each display element in the panel.

    Abstract translation: 使用耦合到每个水平和垂直驱动线路的一对独立驱动的阻抗装置来公开驱动等离子体显示面板的系统,并且其需要通过与每个阻抗装置相关联的电子开关装置的直流电流源来形成分布式驱动器矩阵 面板中每个显示元素的选择方案。

    Optical transducer scale
    6.
    发明授权
    Optical transducer scale 失效
    光学传感器秤

    公开(公告)号:US3872575A

    公开(公告)日:1975-03-25

    申请号:US45435074

    申请日:1974-03-25

    Abstract: An optical grating which has a preselected coefficient of thermal expansion can be made by attaching grating bars to a slotted plate having the desired coefficient of thermal expansion in a position making the bars visible through the slot. The grating bars are transverse to the slot and firmly bonded to its edges, and are carried by a transparent sheet whose effect on thermal expansion of the plate is negligible.

    Abstract translation: 具有预选的热膨胀系数的光栅可以通过将光栅条附接到具有期望的热膨胀系数的开槽板,通过将狭槽视为可见的位置来进行。 光栅棒横向于槽并且牢固地结合到其边缘,并且由透明片承载,其对板的热膨胀的影响是可忽略的。

    Pulse width modulators
    7.
    发明授权
    Pulse width modulators 失效
    脉宽调制器

    公开(公告)号:US3866146A

    公开(公告)日:1975-02-11

    申请号:US44940474

    申请日:1974-03-08

    CPC classification number: H03K7/08

    Abstract: A pulse width modulator according to the present disclosure includes a circuit branch having an integrating device for transforming a signal value to a pulse width of predetermined time period. The integrating device includes a first differential amplifier having an inverting and a non-inverting input, and an output, with a storage device connected between the inverting input and the output of the first amplifier. A second differential amplifier has its inverting input connected to the output of the first amplifier, and has its output connected to a reset device to reset the storage device. One signal input is supplied to the inverting input of the first amplifier and another signal input is supplied to the non-inverting input of the second amplifier. The output is taken from the output of the second amplifier. According to a modification of the apparatus, a second branch is provided, similar to the first, and arranged such that second branch forms part of the reset device for the first branch, and vice versa.

    Abstract translation: 根据本公开的脉宽调制器包括具有用于将信号值变换为预定时间段的脉冲宽度的积分装置的电路分支。 积分装置包括具有反相和非反相输入的第一差分放大器和输出,其中存储装置连接在第一放大器的反相输入端和输出端之间。 第二差分放大器的反相输入端连接到第一放大器的输出,并且其输出端连接到复位装置以复位存储装置。 一个信号输入被提供给第一放大器的反相输入,另一个信号输入被提供给第二放大器的非反相输入端。 输出取自第二放大器的输出。 根据该装置的修改,提供了类似于第一分支的第二分支,并且被布置为使得第二分支形成用于第一分支的复位装置的一部分,反之亦然。

    Cooling systems for electronic modules
    8.
    发明授权
    Cooling systems for electronic modules 失效
    电子模块冷却系统

    公开(公告)号:US3865183A

    公开(公告)日:1975-02-11

    申请号:US40888773

    申请日:1973-10-23

    Inventor: ROUSH MAURICE D

    Abstract: An electronic circuit module is housed in a thermally conductive housing having fluid conduits therein for carrying coolant. The circuit module includes a stack of a plurality of circuit boards supported in the housing, each circuit board having a thermally conductive member attached to opposite side portions thereof, each member having a sawtooth edge portion. A cooling bar is sandwiched between a wall of the housing and the side members of the stack, and includes a surface adapted to abut the inner surface of the wall and a sawtooth portion of each member. Torque means, such as a threaded fastener, is provided for moving the cooling bar to wedge the same between the members and the wall to establish good thermal connection between the coolant in the fluid conduits and the circuit boards.

    Abstract translation: 电子电路模块容纳在导热壳体中,其中具有用于承载冷却剂的流体导管。 电路模块包括支撑在壳体中的多个电路板的堆叠,每个电路板具有连接到其相对侧部的导热构件,每个构件具有锯齿边缘部分。 冷却棒被夹在壳体的壁和堆叠的侧构件之间,并且包括适于邻接壁的内表面的表面和每个构件的锯齿形部分。 提供扭矩装置,例如螺纹紧固件,用于移动冷却杆以使其在构件和壁之间楔入,以在流体导管和电路板之间的冷却剂之间建立良好的热连接。

    Signal multiplexer and demultiplexer
    9.
    发明授权
    Signal multiplexer and demultiplexer 失效
    信号多路复用器和解复用器

    公开(公告)号:US3832494A

    公开(公告)日:1974-08-27

    申请号:US3249670

    申请日:1970-06-10

    Inventor: SEIM H ROEBKE N

    CPC classification number: H04N7/10 H04J7/00

    Abstract: The synchronizing and data signals for the displaying of data on the face of a video display unit are multiplexed into one composite signal by the use of voltage summing apparatus. The composite signal is transmitted on a single coaxial cable to the remotely located display unit where the original signals are reconstructed by circuits sensitive to frequency, level, or both.

    Abstract translation: 通过使用电压求和装置将用于显示视频显示单元的面上的数据的同步和数据信号多路复用为一个复合信号。 复合信号在单个同轴电缆上传输到远程位置的显示单元,其中原始信号由对频率,电平或两者敏感的电路重构。

    Normalize shift count network
    10.
    发明授权
    Normalize shift count network 失效
    正常移动计数网络

    公开(公告)号:US3831012A

    公开(公告)日:1974-08-20

    申请号:US34561373

    申请日:1973-03-28

    Inventor: TATE D DESMONDS D

    CPC classification number: G06F7/74 G06F5/017

    Abstract: In a digital computer, a normalize shift count network is provided which operates on either positive or negative operands stored in a register. The shift count network operates in either a regular mode or a double operand mode where each of the two operands is one-half the regular width operand to produce as a result operand or operands the number of register positions the input operand or operands must be shifted in order to produce normalized operands. Initially the operand is examined by a rank of Exclusive OR circuits arranged so that, generally, each bit of the operand forms one input to two adjacent exclusive OR circuits and so that each exclusive OR circuit, in turn, receives its two independent input quantities from adjacent bits of the operand. The upper bit of the operand is the sign bit and forms one input to a first exclusive OR circuit. The sign bit also forms one input into a second exclusive OR circuit which has as its other input the first significant bit of the operand. The exclusive OR circuits determine where the first significant bit of the operand is located by the comparison of the first bit of the numerical portion of the operand with the sign bit and by subsequent comparison of each bit with the preceeding bit. The shift count for this first significant bit is decoded by examining the outputs of the exclusive OR circuits in a plurality of independent predetermined groups to independently define the individual bit values in a binary number expressing their required shift count for normalization.

    Abstract translation: 在数字计算机中,提供归一化移位计数网络,其操作在存储在寄存器中的正或负操作数。 移位计数网络以常规模式或双操作数模式运行,其中两个操作数中的每一个是常规宽度操作数的一半,以产生操作数或操作数寄存器位置的数量,输入操作数或操作数必须被移位 以便产生标准化操作数。

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