TRANSMITTER WITH COMPENSATION OF VCO PULLING

    公开(公告)号:US20210218425A1

    公开(公告)日:2021-07-15

    申请号:US16739094

    申请日:2020-01-09

    Abstract: A transmitter circuit is disclosed. The transmitter circuit includes a frequency circuit configured to generate a frequency signal, a power amplifier configured to drive an antenna with a drive signal according to the frequency signal, and a programmable delay circuit configured to controllably extend a propagation delay between the frequency signal generated by the frequency circuit and the drive signal of the power amplifier. The programmable delay circuit is programmed with a programming value which causes the transmitter circuit to pass a calibration test.

    VOLTAGE GENERATOR WITH MULTIPLE VOLTAGE VS. TEMPERATURE SLOPE DOMAINS

    公开(公告)号:US20210191444A1

    公开(公告)日:2021-06-24

    申请号:US16726773

    申请日:2019-12-24

    Abstract: An electronic circuit is disclosed. The electronic circuit includes a reference voltage generator, which includes a first candidate circuit configured to generate a first candidate reference voltage, a second candidate circuit configured to generate a second candidate reference voltage, and a selector circuit configured to select one of the first and second candidate reference voltages. The reference voltage generator also includes a third circuit configured to generate a power supply voltage based on the selected candidate reference voltage.

    Hybrid active noise cancellation filter adaptation

    公开(公告)号:US10950213B1

    公开(公告)日:2021-03-16

    申请号:US16888830

    申请日:2020-05-31

    Abstract: An apparatus includes a hybrid adaptive active noise control unit (HAANCU) configured to provide an anti-noise signal to an ear speaker from a reference noise signal of a reference microphone and an error signal of an error microphone, a decimator configured to decimate the reference noise signal and error signal, an adaptive hybrid ANC training unit (AHANCTU) including at least one noise cancellation filter and a filter configured to provide a feedback signal to the at least one noise cancellation, which trains parameters of the AHANCTU based on the decimated reference noise signal, the decimated error signal, and the feedback signal. The apparatus further includes a rate conversion unit configured to up-sample the parameters and update the HAANCU with the up-sampled parameters.

    POST-COMPENSATION FOR CRYSTAL OSCILLATOR THERMAL DRIFT

    公开(公告)号:US20200343856A1

    公开(公告)日:2020-10-29

    申请号:US16575410

    申请日:2019-09-19

    Abstract: Techniques are described for post-compensation of frequency drift due to changes in crystal oscillator temperature during operation. For example, a clock system is coupled with a crystal oscillator, and can use a reference clock signal from the crystal oscillator to generate an output clock signal using a clock generator. The clock system can monitor an electrical characteristic of a thermal component integrated with the oscillator, which it can map deterministically to a thermal value indicating a temperature of a crystal component of the oscillator. The clock system can then map the temperature deterministically to a frequency shift of the oscillator away from a nominal value. The clock system can then generate a post-compensation signal that directs the clock generator to shift the frequency of the clock output signal so as to compensate for at least a portion of the frequency drift.

    Data converters systematic error calibration using on chip generated precise reference signal

    公开(公告)号:US10090848B1

    公开(公告)日:2018-10-02

    申请号:US15871060

    申请日:2018-01-14

    Abstract: A self-calibrating analog-to-digital converter includes a reference signal circuit configured to provide a reference signal, an analog-to-digital converter configured to generate a first digital representation of the reference signal, a dual-slope analog-to-digital converter configured to generate a second digital representation of the reference signal, and a digital engine configured to compare the first digital representation with the second digital representation to obtain a difference and output a calibration signal to the analog-to-digital converter in response to the difference. The reference signal circuit, the analog-to-digital converter, the dual-slop analog-to-digital converter, and digital engine are integrated in an integrated circuit.

    Power detector for radiofrequency power amplifier circuits

    公开(公告)号:US10901009B2

    公开(公告)日:2021-01-26

    申请号:US16281105

    申请日:2019-02-21

    Abstract: Techniques are described for power detection of an amplified signal. For example, power detection described herein can receive an amplified signal from a power amplifier, and can generate an output signal that can be fed back to help regulate an output level of the power amplifier. Embodiments receive the amplified signal can be received by a transistor. A first measurement can be obtained at the transistor's emitter corresponding to an average bias level of the amplified signal, and a second measurement can be obtained at the transistor's base. The output signal can be generated as a function of a difference between the two measurements. Some embodiments further compensate for a measured effective diode voltage corresponding to a base-emitter voltage. Such an approach can generate the power detector output signal to be independent of the β of the transistor, and therefore less affected by variations in process corners and temperature.

    DIFFERENTIAL SWITCHABLE CAPACITORS FOR RADIOFREQUENCY POWER AMPLIFIERS

    公开(公告)号:US20200343857A1

    公开(公告)日:2020-10-29

    申请号:US16395222

    申请日:2019-04-25

    Abstract: Techniques are described for tuning a resonant circuit using differential switchable capacitors. For example, embodiments can operate in context of a power amplifier with a tunable resonant output network. To tune the network, multiple differential switchable capacitors are provided in parallel. Each differential switchable capacitor can include a pair of capacitors, each coupled between a respective internal node and a respective differential terminal; and the internal nodes are selectively coupled or decoupled using a respective electronic switch (e.g., transistor). Switching on one of the differential switchable capacitors forms a capacitive channel having an associated capacitance. Each differential switchable capacitor can also include a switch network to selectively pull the internal nodes to a high or low voltage reference according to the selected operating mode.

    FAST WAKEUP FOR CRYSTAL OSCILLATOR
    9.
    发明申请

    公开(公告)号:US20200169260A1

    公开(公告)日:2020-05-28

    申请号:US16779307

    申请日:2020-01-31

    Abstract: Techniques are described for fast wakeup of a crystal oscillator circuit. Embodiments operate in context of a crystal oscillator coupled with a phase-locked loop (PLL). For example, prior to entering sleep mode, embodiments retain a previously obtained coarse code used to coarse-tune a voltage controlled oscillator of the PLL. On wakeup, the PLL is configured in a chirp mode, in which the retained coarse code and a sweep voltage are used to generate a chirp signal at, or close to, a target stimulating frequency for the crystal oscillator. The chirp signal can be used to inject energy into the crystal oscillator, thereby causing the crystal oscillator to move from sleep mode to steady state oscillation relatively quickly.

    STACKED POWER AMPLIFIERS USING CORE DEVICES
    10.
    发明申请

    公开(公告)号:US20200014351A1

    公开(公告)日:2020-01-09

    申请号:US16028431

    申请日:2018-07-06

    Abstract: A power amplifier includes an input terminal configured to receive a low voltage input signal, an output terminal configured to output a high voltage output signal, and a plurality of amplifiers stacked in series between a first voltage terminal and a second voltage terminal. Each of the amplifiers includes an input capacitor, an output capacitor, an input coupled to the input terminal through the input capacitor, an output coupled to the output terminal through the output capacitor, and a feedback element coupled between the input and the output of the amplifier.

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