公开(公告)号：US08084361B2

公开(公告)日：2011-12-27

申请号：US11755437

申请日：2007-05-30

Applicant: Tsung-Cheng Huang ,  Hua-Shu Wu ,  Fa-Yuan Chang ,  I-Ching Lin ,  Hsi-Lung Lee ,  Yuan-Hao Chien

Inventor： Tsung-Cheng Huang ,  Hua-Shu Wu ,  Fa-Yuan Chang ,  I-Ching Lin ,  Hsi-Lung Lee ,  Yuan-Hao Chien

IPC: H01L21/3213

CPC classification number: B81C1/00634 ,  B81B2201/052

Abstract: A method includes depositing a layer of a sacrificial material in a first region above a substrate. The first region of the substrate is separate from a second region of the substrate, where a corrosion resistant film is to be provided above the second region. The corrosion resistant film is deposited, so that a first portion of the corrosion resistant film is above the sacrificial material in the first region, and a second portion of the corrosion resistant film is above the second region. The first portion of the corrosion resistant film is removed by chemical mechanical polishing. The sacrificial material is removed from the first region using an etching process that selectively etches the sacrificial material, but not the corrosion resistant film.

Abstract translation: 一种方法包括在基底上方的第一区域中沉积牺牲材料层。 衬底的第一区域与衬底的第二区域分离，其中在第二区域上方设置耐腐蚀膜。 沉积耐腐蚀膜，使得耐腐蚀膜的第一部分在第一区域中的牺牲材料之上，并且耐腐蚀膜的第二部分高于第二区域。 通过化学机械抛光除去耐腐蚀膜的第一部分。 使用选择性蚀刻牺牲材料而不是耐腐蚀膜的蚀刻工艺从第一区域去除牺牲材料。

公开(公告)号：US08546886B2

公开(公告)日：2013-10-01

申请号：US13216843

申请日：2011-08-24

Applicant: Ming-Fa Chen ,  I-Ching Lin

Inventor： Ming-Fa Chen ,  I-Ching Lin

IPC: H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC classification number: H01L21/823475 ,  H01L21/28 ,  H01L21/304 ,  H01L21/76898 ,  H01L21/823807 ,  H01L22/12 ,  H01L22/20 ,  H01L27/092 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A device includes a p-type metal-oxide-semiconductor (PMOS) device and an n-type metal-oxide-semiconductor (NMOS) device at a front surface of a semiconductor substrate. A first dielectric layer is disposed on a backside of the semiconductor substrate. The first dielectric layer applies a first stress of a first stress type to the semiconductor substrate, wherein the first dielectric layer is overlying the semiconductor substrate and overlapping a first one of the PMOS device and the NMOS device, and is not overlapping a second one of the PMOS device and the NMOS device. A second dielectric layer is disposed on the backside of the semiconductor substrate. The second dielectric layer applies a second stress to the semiconductor substrate, wherein the second stress is of a second stress type opposite to the first stress type. The second dielectric layer overlaps a second one of the PMOS device and the NMOS device.

公开(公告)号：US20130049127A1

公开(公告)日：2013-02-28

申请号：US13216843

申请日：2011-08-24

Applicant: Ming-Fa Chen ,  I-Ching Lin

Inventor： Ming-Fa Chen ,  I-Ching Lin

IPC: H01L27/092 ,  H01L21/28

CPC classification number: H01L21/823475 ,  H01L21/28 ,  H01L21/304 ,  H01L21/76898 ,  H01L21/823807 ,  H01L22/12 ,  H01L22/20 ,  H01L27/092 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A device includes a p-type metal-oxide-semiconductor (PMOS) device and an n-type metal-oxide-semiconductor (NMOS) device at a front surface of a semiconductor substrate. A first dielectric layer is disposed on a backside of the semiconductor substrate. The first dielectric layer applies a first stress of a first stress type to the semiconductor substrate, wherein the first dielectric layer is overlying the semiconductor substrate and overlapping a first one of the PMOS device and the NMOS device, and is not overlapping a second one of the PMOS device and the NMOS device. A second dielectric layer is disposed on the backside of the semiconductor substrate. The second dielectric layer applies a second stress to the semiconductor substrate, wherein the second stress is of a second stress type opposite to the first stress type. The second dielectric layer overlaps a second one of the PMOS device and the NMOS device.

公开(公告)号：US20120258590A1

公开(公告)日：2012-10-11

申请号：US13527337

申请日：2012-06-19

Applicant: Ming-Fa CHEN ,  I-Ching LIN

Inventor： Ming-Fa CHEN ,  I-Ching LIN

IPC: H01L21/768

CPC classification number: H01L21/76898 ,  H01L21/76838

Abstract: A method includes forming conductive material in a contact hole and a TSV opening, and then performing one step to remove portions of the conductive material outside the contact hole and the TSV opening to leave the conductive material in the contact hole and the TSV opening, thereby forming a contact plug and a TSV structure, respectively. In some embodiments, the removing step is performed by a CMP process.

Abstract translation: 一种方法包括在接触孔和TSV开口中形成导电材料，然后执行一个步骤以去除接触孔外部的导电材料和TSV开口，以将导电材料留在接触孔和TSV开口中，由此 分别形成接触塞和TSV结构。 在一些实施例中，通过CMP工艺执行去除步骤。

公开(公告)号：US08222139B2

公开(公告)日：2012-07-17

申请号：US12750364

申请日：2010-03-30

Applicant: Ming-Fa Chen ,  I-Ching Lin

Inventor： Ming-Fa Chen ,  I-Ching Lin

IPC: H01L21/44

CPC classification number: H01L21/76898 ,  H01L21/76838

Abstract: A method includes forming conductive material in a contact hole and a TSV opening, and then performing one step to remove portions of the conductive material outside the contact hole and the TSV opening to leave the conductive material in the contact hole and the TSV opening, thereby forming a contact plug and a TSV structure, respectively. In some embodiments, the removing step is performed by a CMP process.

Abstract translation: 一种方法包括在接触孔和TSV开口中形成导电材料，然后执行一个步骤以去除接触孔外部的导电材料和TSV开口，以将导电材料留在接触孔和TSV开口中，由此 分别形成接触塞和TSV结构。 在一些实施例中，通过CMP工艺执行去除步骤。

公开(公告)号：US20110244676A1

公开(公告)日：2011-10-06

申请号：US12750364

申请日：2010-03-30

Applicant: Ming-Fa CHEN ,  I-Ching LIN

Inventor： Ming-Fa CHEN ,  I-Ching LIN

IPC: H01L21/768

CPC classification number: H01L21/76898 ,  H01L21/76838

Abstract: A method includes forming conductive material in a contact hole and a TSV opening, and then performing one step to remove portions of the conductive material outside the contact hole and the TSV opening to leave the conductive material in the contact hole and the TSV opening, thereby forming a contact plug and a TSV structure, respectively. In some embodiments, the removing step is performed by a CMP process.

Abstract translation: 一种方法包括在接触孔和TSV开口中形成导电材料，然后执行一个步骤以去除接触孔外部的导电材料和TSV开口，以将导电材料留在接触孔和TSV开口中，由此 分别形成接触塞和TSV结构。 在一些实施例中，通过CMP工艺执行去除步骤。

公开(公告)号：US20080299769A1

公开(公告)日：2008-12-04

申请号：US11755437

申请日：2007-05-30

Applicant: Tsung-Cheng Huang ,  Hua-Shu Wu ,  Fa-Yuan Chang ,  I-Ching Lin ,  Hsi-Lung Lee ,  Yuan-Hao Chien

Inventor： Tsung-Cheng Huang ,  Hua-Shu Wu ,  Fa-Yuan Chang ,  I-Ching Lin ,  Hsi-Lung Lee ,  Yuan-Hao Chien

IPC: H01L21/463

CPC classification number: B81C1/00634 ,  B81B2201/052

Abstract: A method includes depositing a layer of a sacrificial material in a first region above a substrate. The first region of the substrate is separate from a second region of the substrate, where a corrosion resistant film is to be provided above the second region. The corrosion resistant film is deposited, so that a first portion of the corrosion resistant film is above the sacrificial material in the first region, and a second portion of the corrosion resistant film is above the second region. The first portion of the corrosion resistant film is removed by chemical mechanical polishing. The sacrificial material is removed from the first region using an etching process that selectively etches the sacrificial material, but not the corrosion resistant film.

Abstract translation: 一种方法包括在基底上方的第一区域中沉积牺牲材料层。 衬底的第一区域与衬底的第二区域分离，其中在第二区域上方设置耐腐蚀膜。 沉积耐腐蚀膜，使得耐腐蚀膜的第一部分在第一区域中的牺牲材料之上，并且耐腐蚀膜的第二部分高于第二区域。 通过化学机械抛光除去耐腐蚀膜的第一部分。 使用选择性蚀刻牺牲材料而不是耐腐蚀膜的蚀刻工艺从第一区域去除牺牲材料。