公开(公告)号：US08956897B2

公开(公告)日：2015-02-17

申请号：US13598896

申请日：2012-08-30

Applicant: Patrick Rode ,  Martin Strassburg ,  Karl Engl ,  Lutz Höppel

Inventor： Patrick Rode ,  Martin Strassburg ,  Karl Engl ,  Lutz Höppel

IPC: H01L21/00 ,  H01L21/66 ,  H01L33/38 ,  H01L33/22 ,  H01L33/14 ,  H01L33/00 ,  H01L33/62

CPC classification number: H01L33/382 ,  H01L33/007 ,  H01L33/0079 ,  H01L33/14 ,  H01L33/22 ,  H01L33/62 ,  H01L2224/48

Abstract: In a method for producing an optoelectronic component, a growth substrate having a first coefficient of thermal expansion is provided. A multilayered buffer layer sequence is applied thereto. A layer sequence having a second coefficient of thermal expansion—different than the first coefficient of thermal expansion—is subsequently deposited epitaxially. It furthermore comprises an active layer for emitting electromagnetic radiation. A carrier substrate is subsequently applied on the epitaxially deposited layer sequence. The growth substrate is removed and the multilayered buffer layer sequence is structured in order to increase a coupling-out of electromagnetic radiation. Finally, contact is made with the epitaxially deposited layer sequence.

Abstract translation: 在制造光电子部件的方法中，提供具有第一热膨胀系数的生长衬底。 向其施加多层缓冲层序列。 随后沉积具有不同于第一热膨胀系数的第二热膨胀系数的层序列。 它还包括用于发射电磁辐射的有源层。 随后将载体衬底施加在外延沉积层序列上。 去除生长衬底，并且构造多层缓冲层序列以增加电磁辐射的耦合。 最后，用外延沉积层序列进行接触。

公开(公告)号：US08884311B2

公开(公告)日：2014-11-11

申请号：US13696602

申请日：2011-04-29

Applicant: Werner Bergbauer ,  Lutz Höppel ,  Philipp Drechsel ,  Christopher Kölper ,  Martin Straβburg ,  Patrick Rode

Inventor： Werner Bergbauer ,  Lutz Höppel ,  Philipp Drechsel ,  Christopher Kölper ,  Martin Straβburg ,  Patrick Rode

IPC: H01L31/02 ,  H01L31/18 ,  H01L31/0236 ,  H01L33/02 ,  H01L33/22 ,  H01L31/0232 ,  H01L33/12 ,  H01L33/00 ,  H01L33/24

CPC classification number: H01L33/02 ,  H01L31/02 ,  H01L31/02327 ,  H01L31/02363 ,  H01L31/18 ,  H01L33/0079 ,  H01L33/12 ,  H01L33/22 ,  H01L33/24 ,  Y02E10/50

Abstract: An optoelectronic semiconductor chip includes a semiconductor layer stack and a radiation exit face or radiation entrance face, wherein the semiconductor layer stack includes an active layer that generates or receives electromagnetic radiation, and a plurality of nanostructures arranged in the semiconductor layer stack and/or on the radiation exit or entrance face, at least some of the nanostructures including at least one substructure.

Abstract translation: 光电子半导体芯片包括半导体层堆叠和辐射出射面或辐射入射面，其中半导体层堆叠包括产生或接收电磁辐射的有源层，和布置在半导体层堆叠中和/或之上的多个纳米结构 辐射出口或入射面，至少一些纳米结构包括至少一个子结构。

公开(公告)号：US08823034B2

公开(公告)日：2014-09-02

申请号：US13825842

申请日：2011-09-26

Applicant: Werner Bergbauer ,  Patrick Rode ,  Martin Straβburg

Inventor： Werner Bergbauer ,  Patrick Rode ,  Martin Straβburg

IPC: H01L33/00

CPC classification number: H01L33/12 ,  B82Y40/00 ,  H01L33/0025 ,  H01L33/0079 ,  H01L33/20 ,  H01L33/22 ,  H01L33/32 ,  H01L33/382 ,  H01L33/50 ,  H01L33/502 ,  H01L33/508 ,  H01L33/62 ,  H01L2224/48463

Abstract: An optoelectronic semiconductor chip includes a semiconductor layer stack consisting of a nitride compound semiconductor material on a carrier substrate, wherein the carrier substrate includes a surface containing silicon. The semiconductor layer stack includes a recess extending from a back of the semiconductor layer stack through an active layer to a layer of a first conductivity type. The layer of the first conductivity type connects electrically to a first electrical connection layer which covers at least a portion of the back through the recess. The layer of a second conductivity type connects electrically to a second electrical connection layer arranged at the back.

Abstract translation: 光电子半导体芯片包括由载体衬底上的氮化物化合物半导体材料组成的半导体层堆叠，其中载体衬底包括含硅的表面。 半导体层堆叠包括从半导体层堆叠的背面通过有源层延伸到第一导电类型的层的凹部。 第一导电类型的层电连接到通过凹部覆盖背部的至少一部分的第一电连接层。 第二导电类型的层电连接到布置在后面的第二电连接层。

公开(公告)号：US08823024B2

公开(公告)日：2014-09-02

申请号：US12920313

申请日：2009-02-25

Applicant: Karl Engl ,  Patrick Rode ,  Lutz Hoeppel ,  Martin Strassburg

Inventor： Karl Engl ,  Patrick Rode ,  Lutz Hoeppel ,  Martin Strassburg

IPC: H01L29/207

CPC classification number: H01L27/156 ,  H01L25/0753 ,  H01L33/0079 ,  H01L33/382 ,  H01L33/62 ,  H01L2224/48091 ,  H01L2924/00014

Abstract: An optoelectronic semiconductor body comprises a substantially planar semiconductor layer sequence having a first and a second main side, which has an active layer suitable for generating electromagnetic radiation. Furthermore, the semiconductor body comprises at least one trench that severs the active layer of the semiconductor layer sequence and serves for subdividing the active of the semiconductor layer sequence into at least two electrically insulated active partial layers. A first and second connection layer arranged on a second main side serve for making contact with the active partial layers. In this case, the first and second connection layers for making contact with the at least two active partial layers are electrically conductively connected to one another in such a way that the active partial layers form a series circuit.

Abstract translation: 光电子半导体本体包括具有第一和第二主侧的基本上平面的半导体层序列，其具有适于产生电磁辐射的有源层。 此外，半导体本体包括至少一个沟槽，其切断半导体层序列的有源层并且用于将半导体层序列的有源分为至少两个电绝缘的有源部分层。 布置在第二主侧上的第一和第二连接层用于与活性部分层接触。 在这种情况下，用于与至少两个有源部分层接触的第一和第二连接层彼此导电连接，使得有源部分层形成串联电路。

公开(公告)号：US08569079B2

公开(公告)日：2013-10-29

申请号：US13322662

申请日：2010-05-03

Applicant: Elmar Baur ,  Alexander Heindl ,  Bernd Bohm ,  Patrick Rode ,  Heribert Zull

Inventor： Elmar Baur ,  Alexander Heindl ,  Bernd Bohm ,  Patrick Rode ,  Heribert Zull

IPC: H01L21/00

CPC classification number: H01L33/22 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  H01L33/005 ,  H01L33/20

Abstract: A method for producing an optoelectronic semiconductor component includes providing a first wafer having a patterned surface, wherein the patterned surface is formed at least in places by elevations having first and second heights, wherein the first height is greater than the second height; providing a second wafer; applying a photoresist to outer areas of the second wafer; patterning a surface of the photoresist facing away from the second wafer by impressing the patterned surface of the first wafer into the photoresist, wherein the elevations are impressed as trenches having a first and second depth into the photoresist; applying a patterning method to the patterned surface of the photoresist, wherein the structure applied on the photoresist is transferred at least in places to the outer area of the second wafer.

Abstract translation: 一种用于制造光电子半导体部件的方法包括提供具有图案化表面的第一晶片，其中所述图案化表面至少在具有第一和第二高度的高度的位置形成，其中所述第一高度大于所述第二高度; 提供第二晶片; 将光致抗蚀剂施加到第二晶片的外部区域; 通过将第一晶片的图案化表面压印到光致抗蚀剂中，将光致抗蚀剂的表面图案化为远离第二晶片，其中，将高度作为具有第一和第二深度的沟槽印刷到光致抗蚀剂中; 将图案化方法应用于光致抗蚀剂的图案化表面，其中施加在光致抗蚀剂上的结构至少在第二晶片的外部区域被转移。

公开(公告)号：US20130134881A1

公开(公告)日：2013-05-30

申请号：US13702347

申请日：2011-04-13

Applicant: Norwin Von Malm ,  Hubert Maiwald ,  Robert Kraus ,  Patrick Rode ,  Ralph Wirth

Inventor： Norwin Von Malm ,  Hubert Maiwald ,  Robert Kraus ,  Patrick Rode ,  Ralph Wirth

IPC: H05B37/00

CPC classification number: H05B37/00 ,  F21K9/232 ,  F21K9/233 ,  F21V3/00 ,  F21V23/026 ,  F21V29/70 ,  F21V29/74 ,  F21V29/89 ,  F21Y2101/00 ,  F21Y2105/10 ,  F21Y2115/10 ,  H01L25/0753 ,  H01L33/08 ,  H01L33/62 ,  H01L33/647 ,  H01L41/044 ,  H01L41/107 ,  H01L2224/48091 ,  H01L2224/73265 ,  H05B33/0806 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A light-emitting diode arrangement includes a piezoelectric transformer having at least one output connection position, and a high-voltage light-emitting diode including a high-voltage light-emitting diode chip including at least two active regions connected in series with one another, wherein the high-voltage light-emitting diode is electrically connected to the output connection position of the piezo transformer.

Abstract translation: 发光二极管装置包括具有至少一个输出连接位置的压电变压器和包括高压发光二极管芯片的高压发光二极管，所述高压发光二极管芯片包括彼此串联连接的至少两个有源区域， 其中高压发光二极管电连接到压电变压器的输出连接位置。

公开(公告)号：US20120322186A1

公开(公告)日：2012-12-20

申请号：US13598896

申请日：2012-08-30

Applicant: Patrick Rode ,  Martin Strassburg ,  Karl Engl ,  Lutz Höppel

Inventor： Patrick Rode ,  Martin Strassburg ,  Karl Engl ,  Lutz Höppel

IPC: H01L33/12

CPC classification number: H01L33/382 ,  H01L33/007 ,  H01L33/0079 ,  H01L33/14 ,  H01L33/22 ,  H01L33/62 ,  H01L2224/48

Abstract: In a method for producing an optoelectronic component, a growth substrate having a first coefficient of thermal expansion is provided. A multilayered buffer layer sequence is applied thereto. A layer sequence having a second coefficient of thermal expansion—different than the first coefficient of thermal expansion—is subsequently deposited epitaxially. It furthermore comprises an active layer for emitting electromagnetic radiation. A carrier substrate is subsequently applied on the epitaxially deposited layer sequence. The growth substrate is removed and the multilayered buffer layer sequence is structured in order to increase a coupling-out of electromagnetic radiation. Finally, contact is made with the epitaxially deposited layer sequence.

Abstract translation: 在制造光电子部件的方法中，提供具有第一热膨胀系数的生长衬底。 向其施加多层缓冲层序列。 随后沉积具有不同于第一热膨胀系数的第二热膨胀系数的层序列。 它还包括用于发射电磁辐射的有源层。 随后将载体衬底施加在外延沉积层序列上。 去除生长衬底，并且构造多层缓冲层序列以增加电磁辐射的耦合。 最后，用外延沉积层序列进行接触。

公开(公告)号：US20120299049A1

公开(公告)日：2012-11-29

申请号：US13497733

申请日：2010-09-10

Applicant: Patrick Rode ,  Lutz Höppel ,  Norwin von Malm ,  Matthias Sabathil ,  Jürgen Moosburger

Inventor： Patrick Rode ,  Lutz Höppel ,  Norwin von Malm ,  Matthias Sabathil ,  Jürgen Moosburger

IPC: H01L33/48 ,  H01R43/16

CPC classification number: H01L27/153 ,  G01R31/318516 ,  H01H85/0417 ,  H01H85/32 ,  H01L23/5256 ,  H01L25/0753 ,  H01L27/156 ,  H01L33/62 ,  H01L51/50 ,  H01L2224/73265 ,  H01L2924/00 ,  H01L2924/0002 ,  H02H3/046 ,  H03K17/74 ,  H03K19/17728 ,  H05B33/083 ,  H05B33/0893 ,  Y10T29/49204

Abstract: An optoelectronic semiconductor chip has a first semiconductor functional region with a first terminal and a second terminal. A contact structure electrically contacts the optoelectronic semiconductor chip. The contact structure is connected electrically conductively to the first semiconductor functional region. The contact structure has a disconnectable conductor structure. An operating current path is established via the first terminal of the first semiconductor functional region and the second terminal if the conductor structure is not disconnected. This path is interrupted if the conductor structure is disconnected. Alternatively, an operating current path is established via the first terminal of the first semiconductor functional region and the second terminal if the conductor structure is disconnected. The conductor structure connects the first terminal to the second terminal and short circuits the first semiconductor functional region if the conductor structure is not disconnected.

Abstract translation: 光电子半导体芯片具有带有第一端子和第二端子的第一半导体功能区域。 接触结构与光电子半导体芯片电接触。 接触结构电连接到第一半导体功能区。 接触结构具有可断开的导体结构。 如果导体结构不断开，则通过第一半导体功能区域的第一端子和第二端子建立工作电流通路。 如果导体结构断开，则该路径中断。 或者，如果导体结构断开，则通过第一半导体功能区域的第一端子和第二端子建立工作电流路径。 如果导体结构未断开，则导体结构将第一端子连接到第二端子并使第一半导体功能区域短路。

公开(公告)号：US20110272728A1

公开(公告)日：2011-11-10

申请号：US12991864

申请日：2009-04-17

Applicant: Patrick Rode ,  Lutz Hoeppel ,  Karl Engl ,  Tony Albrecht

Inventor： Patrick Rode ,  Lutz Hoeppel ,  Karl Engl ,  Tony Albrecht

IPC: H01L33/36

CPC classification number: H01L25/167 ,  H01L33/0079 ,  H01L33/382 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A radiation-emitting semiconductor chip (1) is provided, which comprises a carrier (5), a semiconductor body (2) with a semiconductor layer sequence, a first contact (35) and a second contact (36). The semiconductor layer sequence comprises an active region (20) provided for generating radiation, which is arranged between a first semiconductor layer (21) and a second semiconductor layer (22). The carrier (5) comprises a major surface (51) facing the semiconductor body (2). The first semiconductor layer (21) is arranged on the side of the active region (20) facing the major surface (51) of the carrier (5) and is electrically contactable by means of the first contact (35). The second semiconductor layer (22) is electrically contactable by means of the second contact (36). A protection diode (4) is formed in a current path extending between the first contact (35) and the second contact (36) through the carrier (5).

Abstract translation: 提供了一种辐射发射半导体芯片（1），其包括载体（5），具有半导体层序列的半导体本体（2），第一触点（35）和第二触点（36）。 半导体层序列包括设置在第一半导体层（21）和第二半导体层（22）之间的用于产生辐射的有源区（20）。 载体（5）包括面向半导体本体（2）的主表面（51）。 第一半导体层（21）布置在与载体（5）的主表面（51）相对的有源区域（20）的侧面上，并且可通过第一触点（35）电接触。 第二半导体层（22）可通过第二接触件（36）电接触。 保护二极管（4）形成在通过载体（5）在第一接触件（35）和第二接触件（36）之间延伸的电流通路中。

公开(公告)号：US20110241031A1

公开(公告)日：2011-10-06

申请号：US13127328

申请日：2009-11-27

Applicant: Norwin von Malm ,  Klaus Streubel ,  Patrick Rode ,  Karl Engl ,  Lutz Hoppel ,  Jurgen Moosburger

Inventor： Norwin von Malm ,  Klaus Streubel ,  Patrick Rode ,  Karl Engl ,  Lutz Hoppel ,  Jurgen Moosburger

IPC: H01L33/62

CPC classification number: H01L33/62 ,  H01L27/156 ,  H01L33/22 ,  H01L33/382 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An optoelectronic projection device which generates a predefined image during operation, including a semiconductor body having an active layer that generates electromagnetic radiation and a radiation exit side and is an imaging element of the projection device, wherein, to electrically contact the semiconductor body, a first contact layer and a second contact layer are arranged at a rear side of the semiconductor body, the rear side lying opposite the radiation exit side, and are electrically insulated from one another by a separating layer.

Abstract translation: 一种光电投影装置，其在工作期间产生预定图像，包括具有产生电磁辐射的有源层和辐射出射侧的半导体本体，并且是投影装置的成像元件，其中，与半导体本体电接触， 接触层和第二接触层设置在半导体本体的后侧，后侧与辐射出口侧相对，并且通过分离层彼此电绝缘。