Abstract:
A display panel and a method for inspecting thereof are provided. The display panel includes a first signal circuit, a second signal circuit and a plurality of first resistor. The first signal circuit includes a plurality of first signal lines which disposes in parallel along a first direction and electrically connects to one another. The second signal circuit includes a plurality of second signal lines disposing in parallel along the first direction, and the second signal lines and the first signal lines are alternately disposed in parallel. Each of second signal lines is connected to at least a first resistor. The interval between the first signal line and the second signal line is smaller than 60 μm and the difference between the resistances of the first signal line and the second signal line is ranged form 300 ohm to 30000 ohm.
Abstract:
A pixel structure includes a plurality of data lines and a common line. The common line overlaps each data line, and is coupled with each data line to respectively form a first coupling capacitor, a second coupling capacitor, a third coupling capacitor, a fourth coupling capacitor, a fifth coupling capacitor, and a sixth coupling capacitor. The third coupling capacitor is smaller than the second coupling capacitor, and the fifth coupling capacitor is smaller than the fourth coupling capacitor.
Abstract:
A liquid crystal display panel includes a first substrate, a second substrate, a liquid crystal layer disposed between the first substrate and the second substrate, a common electrode layer disposed on the first substrate and a plurality of pixel structures disposed on the second substrate. Each of the pixel structure includes a first data line, a second data line, a third data line and at least a capacitance adjusting layer. The capacitance adjusting layer is disposed between the common electrode layer and the second data line.
Abstract:
A pixel array, a pixel structure, and a driving method of a pixel structure are provided. The pixel structure includes a first scan line, a second scan line, a first common electrode line, a data line, a first active device, a second device, a first pixel electrode, and a second pixel electrode. The data line is intersected with the first scan line and the second scan line. The first active device is driven by the first scan line and connected to the data line. The second active device is driven by the second scan line and connected to the first common electrode line. The first pixel electrode is electrically connected to the data line through the first active device. The second pixel electrode is electrically connected to the data line through the first active device and electrically connected to the first common electrode line through the second active device.
Abstract:
A liquid crystal display panel includes a first substrate, a second substrate, a liquid crystal layer disposed between the first substrate and the second substrate, a common electrode layer disposed on the first substrate and a plurality of pixel structures disposed on the second substrate. Each of the pixel structure includes a first data line, a second data line, a third data line and at least a capacitance adjusting layer. The capacitance adjusting layer is disposed between the common electrode layer and the second data line.
Abstract:
A liquid crystal display panel includes an active device substrate, an opposite substrate and a liquid crystal layer. The active device substrate includes a plurality of scan lines, a plurality of data lines intersected with the scan lines, and a plurality of pixels. Each pixel at least includes a first, second, and third sub-pixel. The first, second, and third sub-pixels in each pixel are electrically connected with different data lines respectively, while being electrically connected with the same scan line. The opposite substrate having a common electrode is disposed above the active device substrate. Coupling capacitance (Cdc1) between the data line connected with the second sub-pixel and the common electrode is substantially greater than coupling capacitance (Cdc2) between the data line connected with the first sub-pixel and/or third sub-pixel and the common electrode. The liquid crystal layer is disposed between the active device substrate and the opposite substrate.
Abstract:
A display panel includes at least twelve sub-pixels, arranged continuously in a row. In a scanning time of the display panel, sub-pixels respectively disposed at a 2nd, 3rd, 5th, 8th, 10th and 12th column have a first polarity, and sub-pixels respectively disposed at a 1st, 4th, 6th, 7th, 9th and 11th column have a second polarity. The first polarity is opposite to the second polarity.
Abstract:
In one embodiment, a display includes alternating first and second pixel types. The first pixel type may include a first sub-pixel to emit neutral light (e.g., substantially white light), a second sub-pixel to emit a first color (e.g., substantially green) light, and a third sub-pixel to emit a second (e.g., substantially red) light. The second pixel type may include a first sub-pixel to emit neutral (e.g., substantially white) light, a second sub-pixel to emit a third (e.g., substantially blue) light, and a third sub-pixel to emit the second (e.g., substantially red) light.
Abstract:
A pixel structure includes a plurality of data lines and a common line. The common line overlaps each data line, and is coupled with each data line to respectively form a first coupling capacitor, a second coupling capacitor, a third coupling capacitor, a fourth coupling capacitor, a fifth coupling capacitor, and a sixth coupling capacitor. The third coupling capacitor is smaller than the second coupling capacitor, and the fifth coupling capacitor is smaller than the fourth coupling capacitor.
Abstract:
A pixel structure includes at least one first sub-pixel electrode, at least one second sub-pixel electrode, at least one common line, at least one first transistor electrically connected to the first sub-pixel electrode, and at least one second transistor electrically connected to the second sub-pixel electrode. The common line overlaps and is coupled respectively with the first sub-pixel electrode and the second sub-pixel electrode so as to respectively form a first storage capacitor and a second storage capacitor. The second storage capacitor is larger than the first storage capacitor. A first adjusting capacitor of the first transistor is larger than a second adjusting capacitor of the second transistor.