公开(公告)号：US08995536B2

公开(公告)日：2015-03-31

申请号：US10892897

申请日：2004-07-16

Applicant: Mk Subramanian ,  Sandeep Bhatia ,  Santosh Savekar ,  Gaurav Aggarwal ,  K. Shivapirakasan

Inventor： Mk Subramanian ,  Sandeep Bhatia ,  Santosh Savekar ,  Gaurav Aggarwal ,  K. Shivapirakasan

IPC: H04N7/12 ,  H04N11/02 ,  H04N11/04 ,  H04N21/44 ,  H04N21/43

CPC classification number: H04N21/44004 ,  H04N21/4307

Abstract: Described herein is a system and method for audio visual synchronization. The picture are displayed by receiving an identifier, said identifier associated with a frame buffer storing a picture; extracting a presentation time stamp associated with the picture, wherein the picture is associated with a time stamp; comparing a local time clock value to the presentation time stamp; determining that the picture is mature for presentation if the presentation time stamp exceeds the local time clock value by less than a first predetermined threshold; and determining that the picture is mature for presentation if the local time clock value exceeds the presentation time stamp by less than a second predetermined threshold.

Abstract translation: 这里描述了一种用于视听同步的系统和方法。 通过接收标识符显示图像，所述标识符与存储图像的帧缓冲器相关联; 提取与所述图片相关联的呈现时间戳，其中所述图片与时间戳相关联; 将本地时钟值与演示时间戳进行比较; 如果所述呈现时间戳超过所述本地时间时钟值小于第一预定阈值，则确定所述图片是成熟的; 以及如果所述本地时间时钟值超过所述呈现时间戳小于第二预定阈值，则确定所述图片是否成熟以进行呈现。

公开(公告)号：US08077778B2

公开(公告)日：2011-12-13

申请号：US10725974

申请日：2003-12-02

Applicant: Santosh Savekar ,  Moovaraivendren Subramanian

Inventor： Santosh Savekar ,  Moovaraivendren Subramanian

IPC: H04N7/12

CPC classification number: H04N19/436 ,  H04N19/42 ,  H04N19/44

Abstract: A system, method, and apparatus for decoding and displaying images utilizing two processors and two memory units. The decode process receives images which are encoded according to a predetermined standard. Included with the encoded images are parameters which facilitate the decode and display processes. The decode process decodes the encoded images and the encoded parameters and stores each image in a separate image buffer, and each set of associated parameters in a buffer descriptor structure associated with the image buffer. The decode process is carried on by the first processor. The display process utilizes the parameters associated with the image to determine the appropriate display order for each image, and then display the image accordingly on a display device, based on the associated parameters. The first processor carries on the display of the image on the display device. The second processor determines the display order for the images. The second processor and the second memory can be off-chip.

Abstract translation: 一种使用两个处理器和两个存储器单元解码和显示图像的系统，方法和装置。 解码处理接收根据预定标准编码的图像。 编码图像包括有助于解码和显示过程的参数。 解码过程对编码图像和编码参数进行解码，并将每个图像存储在单独的图像缓冲器中，并将每个相关参数集合在与图像缓冲器相关联的缓冲器描述符结构中。 解码过程由第一处理器承载。 显示过程利用与图像相关联的参数来确定每个图像的适当显示顺序，然后基于相关参数在显示设备上相应地显示图像。 第一处理器在显示装置上进行图像的显示。 第二处理器确定图像的显示顺序。 第二处理器和第二存储器可以是片外的。

公开(公告)号：US07970262B2

公开(公告)日：2011-06-28

申请号：US10914808

申请日：2004-08-10

Applicant: Santosh Savekar ,  Moovaraivendren Subramanian

Inventor： Santosh Savekar ,  Moovaraivendren Subramanian

IPC: H04N5/917

CPC classification number: H04N19/436 ,  H04N19/42 ,  H04N19/44

Abstract: A system, method, and apparatus for decoding and displaying images utilizing two processors and two memory units. The decode process receives images which are encoded according to a predetermined standard. Included with the encoded images are parameters which facilitate the decode and display processes. The decode process decodes the encoded images and the encoded parameters and stores each image in a separate image buffer, and each set of associated parameters in a buffer descriptor structure associated with the image buffer. The decode process is carried on by the first processor. The display process utilizes the parameters associated with the image to determine the appropriate display order for each image, and then display the image accordingly on a display device, based on the associated parameters. The first processor carries on the display of the image on the display device. The second processor determines the display order for the images. The second processor and the second memory can be off-chip.

Abstract translation: 一种使用两个处理器和两个存储器单元解码和显示图像的系统，方法和装置。 解码处理接收根据预定标准编码的图像。 编码图像包括有助于解码和显示过程的参数。 解码过程对编码图像和编码参数进行解码，并将每个图像存储在单独的图像缓冲器中，并将每个相关参数集合在与图像缓冲器相关联的缓冲器描述符结构中。 解码过程由第一处理器承载。 显示过程利用与图像相关联的参数来确定每个图像的适当显示顺序，然后基于相关参数在显示设备上相应地显示图像。 第一处理器在显示装置上进行图像的显示。 第二处理器确定图像的显示顺序。 第二处理器和第二存储器可以是片外的。

公开(公告)号：US08068171B2

公开(公告)日：2011-11-29

申请号：US12730911

申请日：2010-03-24

Applicant: Gaurav Aggarwal ,  M K Subramanian ,  Sandeep Bhatia ,  Santosh Savekar ,  K Shivapirakasan

Inventor： Gaurav Aggarwal ,  M K Subramanian ,  Sandeep Bhatia ,  Santosh Savekar ,  K Shivapirakasan

IPC: H04N7/01 ,  H04N7/08 ,  H04N5/783 ,  H04N5/92

CPC classification number: H04N5/783 ,  Y10S348/901

Abstract: Disclosed are various embodiments for displaying pictures at high speed. In one embodiment, a system includes a buffer for storing parameters associated with a predetermined number of the pictures during a video display period. The system further includes a video decoder for decoding particular ones of the predetermined number of the pictures. The predetermined ones are either reference pictures or pictures that are to be displayed at high speed. The pictures that are displayed in high speed at each display interval have a constant time-lapse between the pictures that are displayed in high speed at the next display interval.

Abstract translation: 公开了用于高速显示图像的各种实施例。 在一个实施例中，系统包括用于在视频显示周期期间存储与预定数量的图像相关联的参数的缓冲器。 该系统还包括用于解码预定数量的图像中的特定图像的视频解码器。 预定的是要高速显示的参考图片或图片。 在每个显示间隔以高速显示的图像在下一个显示间隔以高速显示的图像之间具有恒定的时间延迟。

公开(公告)号：US20050093884A1

公开(公告)日：2005-05-05

申请号：US10725974

申请日：2003-12-02

Applicant: Santosh Savekar ,  Moovaraivendren Subramanian

Inventor： Santosh Savekar ,  Moovaraivendren Subramanian

IPC: G06K9/36 ,  G09G5/00 ,  H04N7/26

CPC classification number: H04N19/436 ,  H04N19/42 ,  H04N19/44

Abstract: A system, method, and apparatus for decoding and displaying images utilizing two processors and two memory units. The decode process receives images which are encoded according to a predetermined standard. Included with the encoded images are parameters which facilitate the decode and display processes. The decode process decodes the encoded images and the encoded parameters and stores each image in a separate image buffer, and each set of associated parameters in a buffer descriptor structure associated with the image buffer. The decode process is carried on by the first processor. The display process utilizes the parameters associated with the image to determine the appropriate display order for each image, and then display the image accordingly on a display device, based on the associated parameters. The first processor carries on the display of the image on the display device. The second processor determines the display order for the images. The second processor and the second memory can be off-chip.

Abstract translation: 一种使用两个处理器和两个存储器单元解码和显示图像的系统，方法和装置。 解码处理接收根据预定标准编码的图像。 编码图像包括有助于解码和显示过程的参数。 解码过程对编码图像和编码参数进行解码，并将每个图像存储在单独的图像缓冲器中，并将每个相关参数集合在与图像缓冲器相关联的缓冲器描述符结构中。 解码过程由第一处理器承载。 显示过程利用与图像相关联的参数来确定每个图像的适当显示顺序，然后基于相关参数在显示设备上相应地显示图像。 第一处理器在显示装置上进行图像的显示。 第二处理器确定图像的显示顺序。 第二处理器和第二存储器可以是片外的。

公开(公告)号：US20050093869A1

公开(公告)日：2005-05-05

申请号：US10726180

申请日：2003-12-02

Applicant: Santosh Savekar ,  Moovaraivendren Subramanian

Inventor： Santosh Savekar ,  Moovaraivendren Subramanian

IPC: G06F13/00 ,  G06F15/16 ,  H04N7/50

CPC classification number: H04N19/61

Abstract: A system, method, and apparatus for decoding and displaying images utilizing two processors and two memory units. The decode process receives images which are encoded according to a predetermined standard. Included with the encoded images are parameters which facilitate the decode and display processes. The decode process decodes the encoded images and the encoded parameters and stores each image in a separate image buffer, and each set of associated parameters in a buffer descriptor structure associated with the image buffer. The decode process is carried on by the first processor. The display process utilizes the parameters associated with the image to determine the appropriate display order for each image, and then display the image accordingly on a display device, based on the associated parameters. The first processor carries on the display of the image on the display device. The second processor determines the display order for the images. The second processor and the second memory are off-chip.

Abstract translation: 一种使用两个处理器和两个存储器单元解码和显示图像的系统，方法和装置。 解码处理接收根据预定标准编码的图像。 编码图像包括有助于解码和显示过程的参数。 解码过程对编码图像和编码参数进行解码，并将每个图像存储在单独的图像缓冲器中，并将每个相关参数集合在与图像缓冲器相关联的缓冲器描述符结构中。 解码过程由第一处理器承载。 显示过程利用与图像相关联的参数来确定每个图像的适当显示顺序，然后基于相关参数在显示设备上相应地显示图像。 第一处理器在显示装置上进行图像的显示。 第二处理器确定图像的显示顺序。 第二处理器和第二存储器是片外的。

公开(公告)号：US07159144B2

公开(公告)日：2007-01-02

申请号：US10600243

申请日：2003-06-20

Applicant: Satheesh Babu ,  Santosh Savekar

Inventor： Satheesh Babu ,  Santosh Savekar

IPC: G06F11/00

CPC classification number: G06F11/3612

Abstract: Disclosed herein are debugging tool(s) for profiling the frequency of execution of certain instructions in a host operation. The debugging tool causes interrupts to occur at random time intervals and records the address of the program counter at each interrupt. A profile is developed that indicates the frequency of execution of certain instructions after a statistically significant number of interrupts.

Abstract translation: 这里公开了用于在主机操作中分析特定指令的执行频率的调试工具。 调试工具会以随机时间间隔发生中断，并在每个中断时记录程序计数器的地址。 在统计上显着数目的中断之后，开发一个指定某些指令执行频率的配置文件。

公开(公告)号：US07133046B2

公开(公告)日：2006-11-07

申请号：US10726180

申请日：2003-12-02

Applicant: Santosh Savekar ,  Moovaraivendren Subramanian

Inventor： Santosh Savekar ,  Moovaraivendren Subramanian

IPC: G06F13/00 ,  G09G5/36 ,  G06K9/36

CPC classification number: H04N19/61

Abstract: A system, method, and apparatus for decoding and displaying images utilizing two processors and two memory units. The decode process receives images which are encoded according to a predetermined standard. Included with the encoded images are parameters which facilitate the decode and display processes. The decode process decodes the encoded images and the encoded parameters and stores each image in a separate image buffer, and each set of associated parameters in a buffer descriptor structure associated with the image buffer. The decode process is carried on by the first processor. The display process utilizes the parameters associated with the image to determine the appropriate display order for each image, and then display the image accordingly on a display device, based on the associated parameters. The first processor carries on the display of the image on the display device. The second processor determines the display order for the images. The second processor and the second memory are off-chip.

Abstract translation: 一种使用两个处理器和两个存储器单元解码和显示图像的系统，方法和装置。 解码处理接收根据预定标准编码的图像。 编码图像包括有助于解码和显示过程的参数。 解码过程对编码图像和编码参数进行解码，并将每个图像存储在单独的图像缓冲器中，并将每个相关参数集合在与图像缓冲器相关联的缓冲器描述符结构中。 解码过程由第一处理器承载。 显示过程利用与图像相关联的参数来确定每个图像的适当显示顺序，然后基于相关参数在显示设备上相应地显示图像。 第一处理器在显示装置上进行图像的显示。 第二处理器确定图像的显示顺序。 第二处理器和第二存储器是片外的。

公开(公告)号：US20050281342A1

公开(公告)日：2005-12-22

申请号：US10874621

申请日：2004-06-22

Applicant: Gaurav Aggarwal ,  M.K. Subramanian ,  Sandeep Bhatia ,  Santosh Savekar ,  K. Shivapirakasan

Inventor： Gaurav Aggarwal ,  M.K. Subramanian ,  Sandeep Bhatia ,  Santosh Savekar ,  K. Shivapirakasan

IPC: H04B1/66 ,  H04N5/783 ,  H04N5/91

CPC classification number: H04N5/783 ,  Y10S348/901

Abstract: Presented herein are systems and methods for slow motion and high speed for digital video. In one embodiment, there is presented a method for displaying pictures. The method comprises displaying a top field from a particular picture, for a predetermined number of consecutive vertical synchronization pulses; and displaying a bottom field from the particular picture for the predetermined number of consecutive vertical synchronization pulses.

Abstract translation: 这里提出了用于数字视频的慢动作和高速度的系统和方法。 在一个实施例中，提供了一种用于显示图片的方法。 该方法包括：对于预定数量的连续垂直同步脉冲显示来自特定图像的顶场; 并且从特定图像显示预定数量的连续垂直同步脉冲的底场。

公开(公告)号：US08165196B2

公开(公告)日：2012-04-24

申请号：US11536409

申请日：2006-09-28

Applicant: Santosh Savekar ,  Moovaraivendren Subramanian

Inventor： Santosh Savekar ,  Moovaraivendren Subramanian

IPC: H04N7/12

CPC classification number: H04N19/42 ,  H04N19/44 ,  H04N19/46 ,  H04N19/61

Abstract: A system, method, and apparatus for decoding and displaying images utilizing two processors and two memory units. The decode process receives images which are encoded according to a predetermined standard. Included with the encoded images are parameters which facilitate the decode and display processes. The decode process decodes the encoded images and the encoded parameters and stores each image in a separate image buffer, and each set of associated parameters in a buffer descriptor structure associated with the image buffer. The decode process is carried on by the first processor. The display process utilizes the parameters associated with the image to determine the appropriate display order for each image, and then display the image accordingly on a display device, based on the associated parameters. The first processor carries on the display of the image on the display device. The second processor determines the display order for the images. The second processor and the second memory are off-chip.

Abstract translation: 一种使用两个处理器和两个存储器单元解码和显示图像的系统，方法和装置。 解码处理接收根据预定标准编码的图像。 编码图像包括有助于解码和显示过程的参数。 解码过程对编码图像和编码参数进行解码，并将每个图像存储在单独的图像缓冲器中，并将每个相关参数集合在与图像缓冲器相关联的缓冲器描述符结构中。 解码过程由第一处理器承载。 显示过程利用与图像相关联的参数来确定每个图像的适当显示顺序，然后基于相关参数在显示设备上相应地显示图像。 第一处理器在显示装置上进行图像的显示。 第二处理器确定图像的显示顺序。 第二处理器和第二存储器是片外的。