公开(公告)号：US10296701B1

公开(公告)日：2019-05-21

申请号：US15195837

申请日：2016-06-28

Applicant: ALTERA CORPORATION

Inventor： Mahesh A. Iyer ,  Vasudeva M. Kamath ,  Robert Lawrence Walker

IPC: G06F17/50

Abstract: A computer-implemented method includes performing retiming using a circuit design to determine a retimed variation to the circuit design. The circuit design includes a first set of registers with defined power-up states and the variations each comprise a second set of registers that correspond to the first set of registers. The method includes maintaining fixed power-up states for the second set of registers in the variations. The fixed power-up states for the second set of registers are equivalent to the defined power-up states of the first set of registers. The method includes identifying registers of the second set of registers involved in an initial state conflict, and performing a mitigating action to resolve the initial state conflict to enable retiming to continue while maintaining functionally equivalent behavior as the circuit design. Various choices of initial states are also explored during retiming to increase the effect of retiming.

公开(公告)号：US10255404B1

公开(公告)日：2019-04-09

申请号：US15195843

申请日：2016-06-28

Applicant: ALTERA CORPORATION

Inventor： Mahesh A. Iyer ,  Vasudeva M. Kamath ,  Robert Lawrence Walker

IPC: G06F17/50

Abstract: A computer-implemented includes performing retiming using a circuit design to determine variation to the circuit design. The circuit design includes a first set of registers with defined power-up states and the variations each comprise a second set of registers that correspond to the first set of registers. The method includes computing and maintaining programmable power-up states for the second set of registers in the variations. The programmable power-up states computed for the second set of registers are equivalent to the defined power-up states of the first set of registers. The method includes identifying registers of the second set of registers involved in an initial state conflict, and performing a mitigating action to resolve the initial state conflict to enable retiming to continue while maintaining functionally equivalent behavior as the circuit design. Various choices of initial states are also explored during retiming to maximize the effect of retiming.