公开(公告)号：US20190088555A1

公开(公告)日：2019-03-21

申请号：US15707786

申请日：2017-09-18

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Chiyu Zhu ,  Kiran Shrestha ,  Pauline Calka ,  Oreste Madia ,  Jan Willem Maes ,  Michael Eugene Givens

IPC: H01L21/8238 ,  H01L29/49 ,  H01L27/092 ,  H01L29/51

Abstract: A method for forming a semiconductor device structure is disclosure. The method may include, depositing an NMOS gate dielectric and a PMOS gate dielectric over a semiconductor substrate, depositing a first work function metal over the NMOS gate dielectric and over the PMOS gate dielectric, removing the first work function metal over the PMOS gate dielectric, and depositing a second work function metal over the NMOS gate dielectric and over the PMOS gate dielectric. Semiconductor device structures including desired metal gate electrodes deposited by the methods of the disclosure are also disclosed.

公开(公告)号：US20180108587A1

公开(公告)日：2018-04-19

申请号：US15673278

申请日：2017-08-09

Applicant: ASM IP Holding B.V.

Inventor： Xiaoqiang Jiang ,  Fu Tang ,  Qi Xie ,  Pauline Calka ,  Sung-Hoon Jung ,  Michael Eugene Givens

IPC: H01L23/31 ,  H01L21/02 ,  H01L23/29 ,  C23C16/455

CPC classification number: H01L23/3171 ,  C23C16/305 ,  C23C16/45544 ,  C23C16/45553 ,  H01L21/02178 ,  H01L21/02205 ,  H01L21/02271 ,  H01L21/02312 ,  H01L21/306 ,  H01L21/67017 ,  H01L21/67155 ,  H01L21/6719 ,  H01L23/291 ,  H01L29/66477

Abstract: A system and a method for passivating a surface of a semiconductor. The method includes providing the surface of the semiconductor to a reaction chamber of a reactor, exposing the surface of the semiconductor to a gas-phase metal containing precursor in the reaction chamber and exposing the surface of the semiconductor to a gas-phase chalcogenide containing precursor. The methods also include passivating the surface of the semiconductor using the gas-phase metal containing precursor and the gas-phase chalcogenide containing precursor to form a passivated surface. The system for passivating a surface of a semiconductor may include a reactor, a metal containing precursor source fluidly coupled to the reactor, and a chalcogenide containing precursor source fluidly couple to the reactor, wherein the metal containing precursor source provides a gas-phase metal containing precursor to a reaction chamber of the reactor, and wherein the chalcogenide containing precursor source provides a gas-phase chalcogenide containing precursor to a reaction chamber of the reactor.

公开(公告)号：US10607895B2

公开(公告)日：2020-03-31

申请号：US15707786

申请日：2017-09-18

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Chiyu Zhu ,  Kiran Shrestha ,  Pauline Calka ,  Oreste Madia ,  Jan Willem Maes ,  Michael Eugene Givens

IPC: H01L21/8238 ,  H01L29/49 ,  H01L29/51 ,  H01L27/092

Abstract: A method for forming a semiconductor device structure is disclosure. The method may include, depositing an NMOS gate dielectric and a PMOS gate dielectric over a semiconductor substrate, depositing a first work function metal over the NMOS gate dielectric and over the PMOS gate dielectric, removing the first work function metal over the PMOS gate dielectric, and depositing a second work function metal over the NMOS gate dielectric and over the PMOS gate dielectric. Semiconductor device structures including desired metal gate electrodes deposited by the methods of the disclosure are also disclosed.

公开(公告)号：US10410943B2

公开(公告)日：2019-09-10

申请号：US15673278

申请日：2017-08-09

Applicant: ASM IP Holding B.V.

Inventor： Xiaoqiang Jiang ,  Fu Tang ,  Qi Xie ,  Pauline Calka ,  Sung-Hoon Jung ,  Michael Eugene Givens

IPC: H01L21/02 ,  H01L23/31 ,  H01L23/29 ,  C23C16/455 ,  H01L21/67 ,  C23C16/30 ,  H01L21/306 ,  H01L29/66

Abstract: A system and a method for passivating a surface of a semiconductor. The method includes providing the surface of the semiconductor to a reaction chamber of a reactor, exposing the surface of the semiconductor to a gas-phase metal containing precursor in the reaction chamber and exposing the surface of the semiconductor to a gas-phase chalcogenide containing precursor. The methods also include passivating the surface of the semiconductor using the gas-phase metal containing precursor and the gas-phase chalcogenide containing precursor to form a passivated surface. The system for passivating a surface of a semiconductor may include a reactor, a metal containing precursor source fluidly coupled to the reactor, and a chalcogenide containing precursor source fluidly couple to the reactor, wherein the metal containing precursor source provides a gas-phase metal containing precursor to a reaction chamber of the reactor, and wherein the chalcogenide containing precursor source provides a gas-phase chalcogenide containing precursor to a reaction chamber of the reactor.

公开(公告)号：US20240096711A1

公开(公告)日：2024-03-21

申请号：US18522867

申请日：2023-11-29

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Chiyu Zhu ,  Kiran Shrestha ,  Pauline Calka ,  Oreste Madia ,  Jan Willem Maes ,  Michael Eugene Givens

IPC: H01L21/8238 ,  H01L27/092 ,  H01L29/49 ,  H01L29/51

CPC classification number: H01L21/823842 ,  H01L27/092 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517

Abstract: A method for forming a semiconductor device structure is disclosure. The method may include, depositing an NMOS gate dielectric and a PMOS gate dielectric over a semiconductor substrate, depositing a first work function metal over the NMOS gate dielectric and over the PMOS gate dielectric, removing the first work function metal over the PMOS gate dielectric, and depositing a second work function metal over the NMOS gate dielectric and over the PMOS gate dielectric. Semiconductor device structures including desired metal gate electrodes deposited by the methods of the disclosure are also disclosed.

公开(公告)号：US20180122959A1

公开(公告)日：2018-05-03

申请号：US15726959

申请日：2017-10-06

Applicant: ASM IP Holding B.V.

Inventor： Pauline Calka ,  Qi Xie ,  Dieter Pierreux ,  Bert Jongbloed

IPC: H01L29/792 ,  H01L21/02 ,  H01L27/11524 ,  C23C16/34 ,  H01L29/66 ,  H01L27/11551

CPC classification number: H01L29/792 ,  C23C16/303 ,  C23C16/34 ,  C23C16/45529 ,  C23C16/45531 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/02178 ,  H01L21/02227 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/0234 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/1157 ,  H01L27/11582 ,  H01L29/66833

Abstract: A semiconductor device and method for manufacturing the semiconductor device are disclosed. Specifically, the semiconductor device may include a charge trapping layer with improved retention and speed for VNAND applications. The charge trapping layer may comprise an aluminum nitride (AlN) or aluminum oxynitride (AlON) layer.

公开(公告)号：US20170117202A1

公开(公告)日：2017-04-27

申请号：US15397237

申请日：2017-01-03

Applicant: ASM IP Holding B.V.

Inventor： Fu Tang ,  Michael E. Givens ,  Qi Xie ,  Xiaoqiang Jiang ,  Petri Raisanen ,  Pauline Calka

IPC: H01L23/31 ,  C23C16/40 ,  C23C16/455 ,  H01L21/02 ,  H01L23/29

CPC classification number: H01L23/3171 ,  C23C16/0227 ,  C23C16/0272 ,  C23C16/305 ,  C23C16/40 ,  C23C16/45544 ,  H01L21/02178 ,  H01L21/02205 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02301 ,  H01L21/02312 ,  H01L21/02532 ,  H01L21/02546 ,  H01L21/02664 ,  H01L21/306 ,  H01L23/29 ,  H01L23/291 ,  H01L23/293 ,  H01L28/00 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Improved methods and systems for passivating a surface of a high-mobility semiconductor and structures and devices formed using the methods are disclosed. The method includes providing a high-mobility semiconductor surface to a chamber of a reactor and exposing the high-mobility semiconductor surface to a gas-phase chalcogen precursor to passivate the high-mobility semiconductor surface.

公开(公告)号：US11532757B2

公开(公告)日：2022-12-20

申请号：US15726959

申请日：2017-10-06

Applicant: ASM IP Holding B.V.

Inventor： Pauline Calka ,  Qi Xie ,  Dieter Pierreux ,  Bert Jongbloed

IPC: H01L29/792 ,  C23C16/30 ,  H01L27/11582 ,  C23C16/455 ,  H01L27/1157 ,  H01L21/02 ,  C23C16/34 ,  H01L27/11524 ,  H01L27/11551 ,  H01L29/66

Abstract: A semiconductor device and method for manufacturing the semiconductor device are disclosed. Specifically, the semiconductor device may include a charge trapping layer with improved retention and speed for VNAND applications. The charge trapping layer may comprise an aluminum nitride (AlN) or aluminum oxynitride (AlON) layer.

公开(公告)号：US20200227325A1

公开(公告)日：2020-07-16

申请号：US16834657

申请日：2020-03-30

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Chiyu Zhu ,  Kiran Shrestha ,  Pauline Calka ,  Oreste Madia ,  Jan Willem Maes ,  Michael Eugene Givens

IPC: H01L21/8238 ,  H01L29/49 ,  H01L29/51 ,  H01L27/092

Abstract: A method for forming a semiconductor device structure is disclosure. The method may include, depositing an NMOS gate dielectric and a PMOS gate dielectric over a semiconductor substrate, depositing a first work function metal over the NMOS gate dielectric and over the PMOS gate dielectric, removing the first work function metal over the PMOS gate dielectric, and depositing a second work function metal over the NMOS gate dielectric and over the PMOS gate dielectric. Semiconductor device structures including desired metal gate electrodes deposited by the methods of the disclosure are also disclosed.

公开(公告)号：US09911676B2

公开(公告)日：2018-03-06

申请号：US15397237

申请日：2017-01-03

Applicant: ASM IP Holding B.V.

Inventor： Fu Tang ,  Michael E. Givens ,  Qi Xie ,  Xiaoqiang Jiang ,  Petri Raisanen ,  Pauline Calka

IPC: H01L21/02 ,  H01L23/31 ,  H01L23/29 ,  C23C16/455 ,  C23C16/40

CPC classification number: H01L23/3171 ,  C23C16/0227 ,  C23C16/0272 ,  C23C16/305 ,  C23C16/40 ,  C23C16/45544 ,  H01L21/02178 ,  H01L21/02205 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02301 ,  H01L21/02312 ,  H01L21/02532 ,  H01L21/02546 ,  H01L21/02664 ,  H01L21/306 ,  H01L23/29 ,  H01L23/291 ,  H01L23/293 ,  H01L28/00 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Improved methods and systems for passivating a surface of a high-mobility semiconductor and structures and devices formed using the methods are disclosed. The method includes providing a high-mobility semiconductor surface to a chamber of a reactor and exposing the high-mobility semiconductor surface to a gas-phase chalcogen precursor to passivate the high-mobility semiconductor surface.