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公开(公告)号:US10346945B2
公开(公告)日:2019-07-09
申请号:US15901603
申请日:2018-02-21
Applicant: ATI Technologies ULC
Inventor: Laurent Lefebvre , Andrew Gruber , Stephen Morein
Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.
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公开(公告)号:US08749563B2
公开(公告)日:2014-06-10
申请号:US13846210
申请日:2013-03-18
Applicant: ATI Technologies ULC
Inventor: Laurent Lefebvre , Andrew Gruber , Stephen Morein
CPC classification number: G06T1/20 , G06F9/3851 , G06T1/60 , G06T15/005 , G06T15/04 , G09G5/001 , G09G5/363
Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.
Abstract translation: 图形处理系统包括存储多个像素命令线程和多个顶点命令线程的至少一个存储器件。 提供耦合到所述至少一个存储器件的仲裁器,其从所述多个像素命令线程中选择像素命令线程,以及从所述多个顶点命令线程中选择顶点命令线程。 仲裁器还从先前选择的像素命令线程和顶点命令线程中选择命令线程,该命令线程被提供给能够处理像素命令线程和顶点命令线程的命令处理引擎。
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公开(公告)号:US11710209B2
公开(公告)日:2023-07-25
申请号:US17661824
申请日:2022-05-03
Applicant: ATI Technologies ULC
Inventor: Laurent Lefebvre , Andrew Gruber , Stephen Morein
CPC classification number: G06T1/20 , G06F9/3851 , G06T1/60 , G06T15/005 , G06T15/04 , G09G5/001 , G09G5/363
Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.
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公开(公告)号:US10957007B2
公开(公告)日:2021-03-23
申请号:US16424145
申请日:2019-05-28
Applicant: ATI Technologies ULC
Inventor: Laurent Lefebvre , Andrew Gruber , Stephen Morein
Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.
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公开(公告)号:US20160140687A1
公开(公告)日:2016-05-19
申请号:US15006802
申请日:2016-01-26
Applicant: ATI Technologies ULC
Inventor: Laurent Lefebvre , Andrew Gruber , Stephen Morein
CPC classification number: G06T1/20 , G06F9/3851 , G06T1/60 , G06T15/005 , G06T15/04 , G09G5/001 , G09G5/363
Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.
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公开(公告)号:US20140292784A1
公开(公告)日:2014-10-02
申请号:US14299600
申请日:2014-06-09
Applicant: ATI Technologies ULC
Inventor: Laurent Lefebvre , Andrew Gruber , Stephen Morein
IPC: G06T1/20
CPC classification number: G06T1/20 , G06F9/3851 , G06T1/60 , G06T15/005 , G06T15/04 , G09G5/001 , G09G5/363
Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.
Abstract translation: 图形处理系统包括存储多个像素命令线程和多个顶点命令线程的至少一个存储器件。 提供耦合到所述至少一个存储器件的仲裁器,其从所述多个像素命令线程中选择像素命令线程,以及从所述多个顶点命令线程中选择顶点命令线程。 仲裁器还从先前选择的像素命令线程和顶点命令线程中选择命令线程,该命令线程被提供给能够处理像素命令线程和顶点命令线程的命令处理引擎。
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公开(公告)号:US20130215128A1
公开(公告)日:2013-08-22
申请号:US13846210
申请日:2013-03-18
Applicant: ATI Technologies ULC
Inventor: Laurent Lefebvre , Andrew Gruber , Stephen Morein
IPC: G06T1/20
CPC classification number: G06T1/20 , G06F9/3851 , G06T1/60 , G06T15/005 , G06T15/04 , G09G5/001 , G09G5/363
Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.
Abstract translation: 图形处理系统包括存储多个像素命令线程和多个顶点命令线程的至少一个存储器件。 提供耦合到所述至少一个存储器件的仲裁器,其从所述多个像素命令线程中选择像素命令线程,以及从所述多个顶点命令线程中选择顶点命令线程。 仲裁器还从先前选择的像素命令线程和顶点命令线程中选择命令线程,该命令线程被提供给能够处理像素命令线程和顶点命令线程的命令处理引擎。
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公开(公告)号:US20190279333A1
公开(公告)日:2019-09-12
申请号:US16424145
申请日:2019-05-28
Applicant: ATI Technologies ULC
Inventor: Laurent LEFEBVRE , Andrew Gruber , Stephen Morein
Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.
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公开(公告)号:US11361399B2
公开(公告)日:2022-06-14
申请号:US17167717
申请日:2021-02-04
Applicant: ATI Technologies ULC
Inventor: Laurent Lefebvre , Andrew Gruber , Stephen Morein
Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.
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公开(公告)号:US20210158473A1
公开(公告)日:2021-05-27
申请号:US17167717
申请日:2021-02-04
Applicant: ATI Technologies ULC
Inventor: Laurent Lefebvre , Andrew Gruber , Stephen Morein
Abstract: A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.
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