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    Semiconductor device and method for manufacturing the same
    2.
    发明授权
    Semiconductor device and method for manufacturing the same 有权

    公开(公告)号：US11784111B2

    公开(公告)日：2023-10-10

    申请号：US17334569

    申请日：2021-05-28

    Applicant: Advanced Semiconductor Engineering, Inc.

    Inventor： Cheng-Yuan Kung ,  Hung-Yi Lin ,  Chin-Cheng Kuo ,  Wu Chou Hsu

    IPC: H01L23/48 ,  H01L21/768 ,  H01L25/16

    CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L25/167

    Abstract: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a semiconductor substrate, at least one conductive via, a second insulation layer and a conductive layer. The conductive via is disposed in the semiconductor substrate and includes an interconnection metal and a first insulation layer around the interconnection metal. A portion of the first insulation layer defines an opening to expose the interconnection metal. The second insulation layer is disposed on a surface of the semiconductor substrate and in the opening. The conductive layer is electrically disconnected with the semiconductor substrate by the second insulation layer and electrically connected to the interconnection metal of the at least one conductive via.

    Package structure and method for manufacturing the same
    3.
    发明授权
    Package structure and method for manufacturing the same 有权

    公开(公告)号：US11502067B2

    公开(公告)日：2022-11-15

    申请号：US16518837

    申请日：2019-07-22

    Applicant: Advanced Semiconductor Engineering, Inc.

    Inventor： Chien-Hua Chen ,  Cheng-Yuan Kung

    IPC: H01L25/10 ,  H01L41/23 ,  H03H9/64 ,  H01L41/047 ,  H01L41/053 ,  H01L41/25 ,  H03H9/60 ,  H01L23/522

    Abstract: A semiconductor package structure includes a plurality of transducer devices, a cap structure, at least one redistribution layer (RDL) and a protection material. The transducer devices are disposed side by side. Each of the transducer devices has at least one transducing region, and includes a die body and at least one transducing element. The die body has a first surface and a second surface opposite to the first surface. The transducing region is disposed adjacent to the first surface of the die body. The transducing element is disposed adjacent to the first surface of the die body and within the transducing region. The cap structure covers the transducing region of the transducer device to form an enclosed space. The redistribution layer (RDL) electrically connects the transducer devices. The protection material covers the transducer devices.

    Package structure
    5.
    发明授权
    Package structure 有权

    公开(公告)号：US12218075B2

    公开(公告)日：2025-02-04

    申请号：US17566575

    申请日：2021-12-30

    Applicant: Advanced Semiconductor Engineering, Inc.

    Inventor： Cheng-Yuan Kung ,  Hsu-Chiang Shih ,  Hung-Yi Lin ,  Chien-Mei Huang

    IPC: H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065

    Abstract: A package structure includes an encapsulant, a patterned circuit structure, at least one electronic component and a shrinkage modifier. The patterned circuit structure is disposed on the encapsulant and includes a pad. The electronic component is disposed on the patterned circuit structure, and includes a bump electrically connected to the pad. The shrinkage modifier is encapsulated in the encapsulant and configured to reduce a relative displacement between the bump and the pad along a horizontal direction in an environment of temperature variation.

    Capacitor bank structure and semiconductor package structure
    7.
    发明授权
    Capacitor bank structure and semiconductor package structure 有权

    公开(公告)号：US11545427B2

    公开(公告)日：2023-01-03

    申请号：US16447839

    申请日：2019-06-20

    Applicant: Advanced Semiconductor Engineering, Inc.

    Inventor： Cheng-Yuan Kung ,  Chien-Hua Chen ,  Teck-Chong Lee ,  Hung-Yi Lin ,  Pao-Nan Lee ,  Hsin Hsiang Wang ,  Min-Tzu Hsu ,  Po-Hao Chen

    IPC: H01L23/52 ,  H01L23/522 ,  H01L49/02 ,  H01L25/16 ,  H01L23/528 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56

    Abstract: A capacitor bank structure includes a plurality of capacitors, a protection material, a first dielectric layer and a plurality of first pillars. The capacitors are disposed side by side. Each of the capacitors has a first surface and a second surface opposite to the first surface, and includes a plurality of first electrodes and a plurality of second electrodes. The first electrodes are disposed adjacent to the first surface for external connection, and the second electrodes are disposed adjacent to the second surface for external connection. The protection material covers the capacitors, sidewalls of the first electrodes and sidewalls of the second electrodes, and has a first surface corresponding to the first surface of the capacitor and a second surface corresponding to the second surface of the capacitor. The first dielectric layer is disposed on the first surface of the protection material, and defines a plurality of openings to expose the first electrodes. The first pillars are disposed in the openings of the first dielectric layer and protrude from the first dielectric layer.

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