Substrate, semiconductor device package and method of manufacturing the same

    公开(公告)号:US11776885B2

    公开(公告)日:2023-10-03

    申请号:US17397842

    申请日:2021-08-09

    Abstract: A substrate includes a first dielectric layer having a first surface and a second dielectric layer having a first surface disposed adjacent to the first surface of the first dielectric layer. The substrate further includes a first conductive via disposed in the first dielectric layer and having a first end adjacent to the first surface of the first dielectric layer and a second end opposite the first end. The substrate further includes a second conductive via disposed in the second dielectric layer and having a first end adjacent to the first surface of the second dielectric layer. A width of the first end of the first conductive via is smaller than a width of the second end of the first conductive via, and a width of the first end of the second conductive via is smaller than the width of the first end of the first conductive via.

    Semiconductor device package and method for manufacturing the same

    公开(公告)号:US11469186B2

    公开(公告)日:2022-10-11

    申请号:US16938818

    申请日:2020-07-24

    Abstract: A semiconductor device package and method for manufacturing the same are provided. The semiconductor device package includes a first conductive structure, a stress buffering layer and a second conductive structure. The first conductive structure includes a substrate, and a first circuit layer disposed on the substrate. The first circuit layer includes a conductive wiring pattern, and the conductive wiring pattern is an uppermost conductive pattern of the first circuit layer. The stress buffering structure is disposed on the first conductive structure. The second conductive structure is disposed over the stress buffering structure. The conductive wiring pattern extends through the stress buffering structure and electrically connected to the second conductive structure, and an upper surface of the conductive wiring pattern is substantially coplanar with an upper surface of the stress buffering structure.

    Circuit board with embedded passive component and manufacturing method thereof
    5.
    发明授权
    Circuit board with embedded passive component and manufacturing method thereof 有权
    嵌入式无源元件电路板及其制造方法

    公开(公告)号:US09426891B2

    公开(公告)日:2016-08-23

    申请号:US14550615

    申请日:2014-11-21

    Abstract: The present disclosure relates to a semiconductor device substrate and a method for making the same. The semiconductor device substrate includes a first dielectric layer, a second dielectric layer and an electronic component. The first dielectric layer includes a body portion, and a wall portion protruded from a first surface of the body portion. The wall portion has an end. The second dielectric layer has a first surface and an opposing second surface. The first surface of the second dielectric layer is adjacent to the first surface of the body portion. The second dielectric layer surrounds the wall portion. The end of the wall portion extends beyond the second surface of the second dielectric layer. The electronic component includes a first electrical contact and a second electrical contact. At least a part of the electronic component is surrounded by the wall portion.

    Abstract translation: 本公开涉及一种半导体器件基板及其制造方法。 半导体器件基板包括第一介电层,第二介电层和电子部件。 第一电介质层包括主体部分和从主体部分的第一表面突出的壁部分。 壁部分有一端。 第二电介质层具有第一表面和相对的第二表面。 第二电介质层的第一表面与主体部分的第一表面相邻。 第二电介质层围绕壁部。 壁部分的端部延伸超过第二介电层的第二表面。 电子部件包括第一电接触和第二电接触。 电子部件的至少一部分被壁部包围。

    Semiconductor substrate, semiconductor package, and method for forming the same

    公开(公告)号:US11024555B2

    公开(公告)日:2021-06-01

    申请号:US16878475

    申请日:2020-05-19

    Abstract: The present disclosure provides a semiconductor substrate, including a first patterned conductive layer, a dielectric structure on the first patterned conductive layer, wherein the dielectric structure having a side surface, a second patterned conductive layer on the dielectric structure and extending on the side surface, and a third patterned conductive layer on the second patterned conductive layer and extending on the side surface. The present disclosure provides a semiconductor package including the semiconductor substrate. A method for manufacturing the semiconductor substrate and the semiconductor package is also provided.

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