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公开(公告)号：US20250118638A1
公开(公告)日：2025-04-10
申请号：US18378503
申请日：2023-10-10
Inventor： Yan Xun Xue , Madhur Bobde , Long-Ching Wang , Jian Yin , Lin Chen , Ziwei Yu , Xiaobin Wang , Zhiqiang Niu , Kuan-Hung Li
IPC: H01L23/495 , H01L23/00 , H01L23/31
Abstract: A semiconductor package comprises a first device and a second device. The structure of the first semiconductor device is similar to that of the second semiconductor device. The first semiconductor device comprises a lead frame strip, a first plurality of field effect transistors (FETs), a first plurality of clips, a second plurality of FETs, a second plurality of clips, and a first molding encapsulation. A method is applied to fabricate a plurality of semiconductor packages. The method comprises the steps of providing a lead frame strip, attaching a first plurality of FETs, attaching a first plurality of clips, attaching a second plurality of FETs, attaching a second plurality of clips, and forming a molding encapsulation.
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公开(公告)号：US20250096081A1
公开(公告)日：2025-03-20
申请号：US18368557
申请日：2023-09-14
Inventor： Madhur Bobde , Yan Xun Xue , Long-Ching Wang , Jian Yin , Sitthipong Angkititrakul
IPC: H01L23/495 , H01L21/56 , H01L23/00 , H01L23/31 , H01L23/552
Abstract: A semiconductor package comprising a lead frame, a low side field-effect transistor (FET), a high side FET, a metal clip, an interposer, an integrated circuit (IC) controller, and a molding encapsulation. A method, for fabricating a semiconductor package, comprises the steps of: providing a lead frame; attaching a low side FET and a high side FET; mounting a metal clip; attaching an interposer; mounting an IC controller, forming a molding encapsulation; and applying a singulation process.
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公开(公告)号：US20250088118A1
公开(公告)日：2025-03-13
申请号：US18959681
申请日：2024-11-26
Inventor： Sitthipong Angkititrakul , Yu Ding , Jian Yin
Abstract: A power converter incorporating a synchronous rectifier implements adaptive gate voltage regulation for fast turn-off of the synchronous rectifier. In some embodiments, the adaptive gate voltage regulation circuit detects a voltage indicative of a drain current of the synchronous rectifier in each SR conduction cycle and monitors a slope of the detected voltage indicative of a rate of decrease of the drain current of the synchronous rectifier. The adaptive gate voltage regulation circuit further selects a gate discharge current as a function of the slope of the detected voltage to apply to the gate terminal of the synchronous rectifier.
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4.发明公开公开(公告)号：US20240171083A1
公开(公告)日：2024-05-23
申请号：US18058219
申请日：2022-11-22
Inventor： Sitthipong Angkititrakul , Yu Ding , Jian Yin
CPC classification number: H02M3/33592 , H02M1/36
Abstract: A power converter incorporating a synchronous rectifier implements adaptive gate voltage regulation for fast turn-off of the synchronous rectifier. In some embodiments, the adaptive gate voltage regulation circuit and method monitors the slope of the synchronous rectifier current during the on period of the synchronous rectifier. In response to detecting the synchronous rectifier current decreasing rapidly, a larger gate discharge current is applied to quickly discharge the synchronous rectifier gate voltage. In response to detecting the synchronous rectifier current decreasing more moderately, a smaller gate discharge current is applied to discharge the synchronous rectifier gate voltage in a moderate manner. When the synchronous rectifier can be turned off quickly, large reverse current and large drain voltage spike at the synchronous rectifier is avoided. The adaptive gate voltage regulation circuit and method is particularly useful when the power converter is operated in the discontinuous conduction mode.
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公开(公告)号：US12218602B2
公开(公告)日：2025-02-04
申请号：US18058219
申请日：2022-11-22
Inventor： Sitthipong Angkititrakul , Yu Ding , Jian Yin
Abstract: A power converter incorporating a synchronous rectifier implements adaptive gate voltage regulation for fast turn-off of the synchronous rectifier. In some embodiments, the adaptive gate voltage regulation circuit and method monitors the slope of the synchronous rectifier current during the on period of the synchronous rectifier. In response to detecting the synchronous rectifier current decreasing rapidly, a larger gate discharge current is applied to quickly discharge the synchronous rectifier gate voltage. In response to detecting the synchronous rectifier current decreasing more moderately, a smaller gate discharge current is applied to discharge the synchronous rectifier gate voltage in a moderate manner. When the synchronous rectifier can be turned off quickly, large reverse current and large drain voltage spike at the synchronous rectifier is avoided. The adaptive gate voltage regulation circuit and method is particularly useful when the power converter is operated in the discontinuous conduction mode.
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Patent Agency Ranking
公开(公告)号：US12160196B2
公开(公告)日：2024-12-03
申请号：US18049969
申请日：2022-10-26
Inventor： ChengYuan He , Sitthipong Angkititraku , Jian Yin , Lin Chen
IPC: G01R19/165 , H02P6/28 , H02P27/08 , H02K7/14
Abstract: Apparatus and associated methods relate to a Source Terminal Replication Compensation Circuit for simulating an accurate fraction of a load current. In an illustrative example, a Source Terminal Replication Compensation Circuit (STRCC) may be connected to a motor driving circuit. The STRCC, for example, may include a simulation transistor configured to have a simulated structure of a main transistor in a motor driving circuit. The STRCC may include, for example, a disturbance rejection module (DRM). The DRM may be connected to a source terminal of the sense transistor, and a source terminal of the main transistor. When the DRM is connected to a current sensing resistor, a sense current is generated as a predetermined fraction of a load current of the motor driving circuit, wherein the predetermined fraction is less than 1%. Various embodiments may advantageously reduce heat dissipations at the current sensor resistor.
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公开(公告)号：US20240146218A1
公开(公告)日：2024-05-02
申请号：US18049969
申请日：2022-10-26
Inventor： ChengYuan He , Sitthipong Angkititraku , Jian Yin , Lin Chen
Abstract: Apparatus and associated methods relate to a Source Terminal Replication Compensation Circuit for simulating an accurate fraction of a load current. In an illustrative example, a Source Terminal Replication Compensation Circuit (STRCC) may be connected to a motor driving circuit. The STRCC, for example, may include a simulation transistor configured to have a simulated structure of a main transistor in a motor driving circuit. The STRCC may include, for example, a disturbance rejection module (DRM). The DRM may be connected to a source terminal of the sense transistor, and a source terminal of the main transistor. When the DRM is connected to a current sensing resistor, a sense current is generated as a predetermined fraction of a load current of the motor driving circuit, wherein the predetermined fraction is less than 1%. Various embodiments may advantageously reduce heat dissipations at the current sensor resistor.
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公开(公告)号：US20250158428A1
公开(公告)日：2025-05-15
申请号：US18509168
申请日：2023-11-14
Inventor： Sitthipong Angkititrakul , Jian Yin
IPC: H02J7/00 , G01R31/3842 , H01M10/42 , H01M10/44 , H02H7/18
Abstract: A device for resistor lossless current sensing includes a first power transistor, a sense transistor and current sense conversion circuit. The first sense transistor has its gate conductively coupled with a gate of the first power transistor and its drain conductively coupled with the drain of the first power transistor. The current sense conversion circuit is configured to convert a current output from the first sense transistor to an output voltage. The current output from the first sense resistor and output voltage are proportional to the current from the current input to the device and the current sense conversion circuit generates the output voltage which is not in a current path through the first power transistor.
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公开(公告)号：US20250157894A1
公开(公告)日：2025-05-15
申请号：US18758522
申请日：2024-06-28
Inventor： Yan Xun Xue , Jian Yin , Long-Ching Wang , Sitthipong Angkititrakul , Xiaobin Wang , Bo Chen
IPC: H01L23/495 , H01L23/00 , H01L23/31 , H01L25/00 , H01L25/065 , H01L29/772
Abstract: A semiconductor package comprises a lead frame, a first field-effect transistor (FET), a second FET, an integrated circuit (IC), a plurality of bond wires, and a molding encapsulation. The lead frame comprises a first die paddle and a second die paddle. The first FET is flipped and attached to the first die paddle. The second FET is flipped and attached to the second die paddle. A method comprises the steps of providing a lead frame comprising a first die paddle and a second die paddle; applying a first adhesive layer; mounting a first FET and a second FET; applying a second adhesive layer; mounting an IC; applying bonding wires; forming a molding encapsulation; and applying a singulation process so as to form a plurality of semiconductor packages.
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10.发明公开公开(公告)号：US20240154535A1
公开(公告)日：2024-05-09
申请号：US18053036
申请日：2022-11-07
Inventor： Yu Ding , Sitthipong Angkititrakul , Jian Yin
CPC classification number: H02M3/33592 , H02M1/36
Abstract: A power converter incorporating a synchronous rectifier implements adaptive turn-off voltage control for fast turn-off of the synchronous rectifier in the continuous conduction mode. In some embodiments, the synchronous rectifier turn off detection threshold is adaptively changed as a function of the detected operation mode of the power converter. In response to detecting the power converter being operated in the continuous conduction mode, the synchronous rectifier turn off detection threshold is set to a voltage value farther away from zero volt as compared to the nominal turn off detection threshold. In this manner, the synchronous rectifier can be turned off earlier while in the continuous conduction mode. When the synchronous rectifier can be turned off quickly, large reverse current or negative current as well as large drain voltage spike at the synchronous rectifier can be avoided. The reliability of the synchronous rectifier and the power converter is improved.
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