DISPLAY PANEL VOLTAGE PROTECTION SCHEME

    公开(公告)号:US20240420615A1

    公开(公告)日:2024-12-19

    申请号:US18660166

    申请日:2024-05-09

    Applicant: Apple Inc.

    Abstract: An electronic device may include a display panel and a display driver. The display panel may include multiple pixels each receiving a supply voltage and a respective data voltage to emit light. The display driver may include a low drop-out regulator (LDO) to provide the supply voltage to the pixels. The LDO may operate in a normal operation mode and a hard park mode. In the normal operation mode, the LDO may generate the supply voltage based on receiving a reference voltage and a bias voltage within a bias voltage range to operate in the normal operation mode. In the hard park mode, the LDO may become idle (e.g., shut-down mode) based on receiving a hard park mode voltages from dedicated replacement circuits. For example, including the dedicated reference voltage replacement circuit with the display driver may improve reliability and efficiency of the electronic device when de-energizing the LDO.

    ON-CHIP TESTING ARCHITECTURE FOR DISPLAY SYSTEM

    公开(公告)号:US20220076599A1

    公开(公告)日:2022-03-10

    申请号:US17397953

    申请日:2021-08-09

    Applicant: Apple Inc.

    Abstract: Embodiments disclosed herein provide systems and methods for testing and repairing various aspects of an electronic display. The electronic display includes a reference array and an active array. The electronic display also includes test circuitry used to test individual or any combination of pixels of the electronic display. Switches may be disposed between the pixels and the test circuitry to be to repair the various components of the electronic display.

    AUTO-ZERO APPLIED BUFFER FOR DISPLAY CIRCUITRY

    公开(公告)号:US20210056904A1

    公开(公告)日:2021-02-25

    申请号:US16905895

    申请日:2020-06-18

    Applicant: Apple Inc.

    Abstract: A system includes a pixel that emits light based on a signal provided to the pixel. The system may also include a buffer circuit having a differential pair stage, a cascade stage, and an output stage. The differential pair stage may receive a common mode voltage signal via a first switch in response to the first switch receiving a first signal that causes the first switch to close. The differential pair stage may couple a capacitor to the output stage via a second switch that operate based on a second signal, such that the capacitor reduces an offset provided by one or more circuit components in the differential pair stage, the cascade stage, the output stage, or any combination thereof. The differential pair stage may output the common mode voltage to the pixel via the output stage in response to the first signal being present.

    Enhanced smoothness digital-to-analog converter interpolation systems and methods

    公开(公告)号:US11651719B2

    公开(公告)日:2023-05-16

    申请号:US17376131

    申请日:2021-07-14

    Applicant: Apple Inc.

    Abstract: An electronic device may include an electronic display panel having multiple display pixels for displaying an image based on analog voltage signals. The electronic device may also include interpolation circuitry to generate the analog voltage signals based on digital image data corresponding to the image. The interpolation circuitry may also receive analog reference voltages and interpolate between sets of the analog reference voltages to generate intermediate voltages, which may be a part of the analog voltage signals. Interpolating between the sets analog reference voltages may include performing a first level interpolation of a first set of the analog reference voltages to generate a first intermediate voltage and performing a second level interpolation of a second set of the analog reference voltages to generate a second intermediate voltage, wherein the first level interpolation is different from the second level interpolation.

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