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公开(公告)号:US20240030947A1
公开(公告)日:2024-01-25
申请号:US17871677
申请日:2022-07-22
Applicant: Apple Inc.
Inventor: Filipe Tabarani , Timo W Gossmann
Abstract: The current disclosure is related to a column and line digital-to-analog converter (DAC) with a hybrid coupler for generating quadrature analog signals. The DAC may include an array of unit power amplifiers (cells). A first portion of the cells of the array may be coupled to a first column decoder to receive in-phase components of digital signals and a second portion of the cells may be coupled to a second column decoder to receive quadrature components of the digital signals. The first portion of the cells of the array may generate in-phase components of analog signals and the second portion of the cells of the array may generate quadrature components of the analog signals. A hybrid coupler of the DAC may receive the in-phase and quadrature components of the analog signals with a similar phase, delay the quadrature components by a phase delay (e.g., 90 degrees), and output the resulting analog signals.
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公开(公告)号:US20240028060A1
公开(公告)日:2024-01-25
申请号:US17872993
申请日:2022-07-25
Applicant: Apple Inc.
Inventor: Antonio Passamani , Timo W Gossmann , Adrien F Vargas , Guillaume Gourlat
CPC classification number: G05F1/468 , H03M1/66 , G05F1/561 , G05F1/575 , H03F3/45071
Abstract: The present disclosure relates to power management for digital-to-analog converters (DACs). As electronic devices and the components therein become increasingly smaller to satisfy the desire for more compact/portable devices, the operating voltage may be reduced to reduce the likelihood of shorts and/or voltage/current bleeds. To maintain comparable power output with the reduced operating voltage, the current may increase proportionally to the decrease in voltage. Consequently, in scaled devices and applications, high-current low-voltage regulators may be beneficial. As such, a low-dropout regulator (LDO) including one or more operational amplifiers and multiple pass devices may be implemented between a power supply and the DAC to regulate the power supply to the DAC. Moreover, the LDO may include one or more feedback loops to maintain a desired voltage regulation of the pass devices.
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公开(公告)号:US20250023574A1
公开(公告)日:2025-01-16
申请号:US18904845
申请日:2024-10-02
Applicant: Apple Inc.
Inventor: Antonio Passamani , Timo W Gossmann , Adrien F Vargas , Guillaume Gourlat
Abstract: The present disclosure relates to power management for digital-to-analog converters (DACs). As electronic devices and the components therein become increasingly smaller to satisfy the desire for more compact/portable devices, the operating voltage may be reduced to reduce the likelihood of shorts and/or voltage/current bleeds. To maintain comparable power output with the reduced operating voltage, the current may increase proportionally to the decrease in voltage. Consequently, in scaled devices and applications, high-current low-voltage regulators may be beneficial. As such, a low-dropout regulator (LDO) including one or more operational amplifiers and multiple pass devices may be implemented between a power supply and the DAC to regulate the power supply to the DAC. Moreover, the LDO may include one or more feedback loops to maintain a desired voltage regulation of the pass devices.
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公开(公告)号:US20240030929A1
公开(公告)日:2024-01-25
申请号:US17871683
申请日:2022-07-22
Applicant: Apple Inc.
Inventor: Filipe Tabarani , Timo W Gossmann
CPC classification number: H03M1/002 , H03M1/0648 , H04L27/362 , H04L27/206
Abstract: The current disclosure is related to a column and line digital-to-analog converter (DAC) with a hybrid coupler for generating quadrature analog signals. The DAC may include an array of unit power amplifiers (cells). A first portion of the cells of the array may be coupled to a first column decoder to receive in-phase components of digital signals and a second portion of the cells may be coupled to a second column decoder to receive quadrature components of the digital signals. The first portion of the cells of the array may generate in-phase components of analog signals and the second portion of the cells of the array may generate quadrature components of the analog signals. A hybrid coupler of the DAC may receive the in-phase and quadrature components of the analog signals with a similar phase, delay the quadrature components by a phase delay (e.g., 90 degrees), and output the resulting analog signals.
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公开(公告)号:US12184294B2
公开(公告)日:2024-12-31
申请号:US17872993
申请日:2022-07-25
Applicant: Apple Inc.
Inventor: Antonio Passamani , Timo W Gossmann , Adrien F Vargas , Guillaume Gourlat
Abstract: The present disclosure relates to power management for digital-to-analog converters (DACs). As electronic devices and the components therein become increasingly smaller to satisfy the desire for more compact/portable devices, the operating voltage may be reduced to reduce the likelihood of shorts and/or voltage/current bleeds. To maintain comparable power output with the reduced operating voltage, the current may increase proportionally to the decrease in voltage. Consequently, in scaled devices and applications, high-current low-voltage regulators may be beneficial. As such, a low-dropout regulator (LDO) including one or more operational amplifiers and multiple pass devices may be implemented between a power supply and the DAC to regulate the power supply to the DAC. Moreover, the LDO may include one or more feedback loops to maintain a desired voltage regulation of the pass devices.
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公开(公告)号:US12052024B2
公开(公告)日:2024-07-30
申请号:US17871683
申请日:2022-07-22
Applicant: Apple Inc.
Inventor: Filipe Tabarani , Timo W Gossmann
CPC classification number: H03M1/002 , H03M1/0648 , H04L27/206 , H04L27/362 , H03M1/66
Abstract: The current disclosure is related to a column and line digital-to-analog converter (DAC) with a hybrid coupler for generating quadrature analog signals. The DAC may include an array of unit power amplifiers (cells). A first portion of the cells of the array may be coupled to a first column decoder to receive in-phase components of digital signals and a second portion of the cells may be coupled to a second column decoder to receive quadrature components of the digital signals. The first portion of the cells of the array may generate in-phase components of analog signals and the second portion of the cells of the array may generate quadrature components of the analog signals. A hybrid coupler of the DAC may receive the in-phase and quadrature components of the analog signals with a similar phase, delay the quadrature components by a phase delay (e.g., 90 degrees), and output the resulting analog signals.
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公开(公告)号:US11870473B1
公开(公告)日:2024-01-09
申请号:US17871677
申请日:2022-07-22
Applicant: Apple Inc.
Inventor: Filipe Tabarani , Timo W Gossmann
Abstract: The current disclosure is related to a column and line digital-to-analog converter (DAC) with a hybrid coupler for generating quadrature analog signals. The DAC may include an array of unit power amplifiers (cells). A first portion of the cells of the array may be coupled to a first column decoder to receive in-phase components of digital signals and a second portion of the cells may be coupled to a second column decoder to receive quadrature components of the digital signals. The first portion of the cells of the array may generate in-phase components of analog signals and the second portion of the cells of the array may generate quadrature components of the analog signals. A hybrid coupler of the DAC may receive the in-phase and quadrature components of the analog signals with a similar phase, delay the quadrature components by a phase delay (e.g., 90 degrees), and output the resulting analog signals.
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