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公开(公告)号:US20230411462A1
公开(公告)日:2023-12-21
申请号:US18460290
申请日:2023-09-01
Applicant: Applied Materials, Inc.
Inventor: Akhil Singhal , Allison Yau , Sang-Jin Kim , Zeqiong Zhao , Zhijun Jiang , Deenesh Padhi , Ganesh Balasubramanian
IPC: H01L21/28 , H01L29/423 , H01L21/3213 , H01L21/311
CPC classification number: H01L29/40114 , H01L21/31116 , H01L21/32137 , H01L29/42324
Abstract: Exemplary semiconductor structures and processing methods may include forming a first portion of a first semiconductor layer characterized by a first etch rate for an etch treatment, forming a second portion of the first semiconductor layer characterized by a second etch rate that is less than the first etch rate for the etch treatment, and forming a third portion of the first semiconductor layer characterized by a third etch rate that is greater than the second etch rate. The processing methods may further include etching an opening through the first semiconductor layer, where the opening has a height and a width, and where the opening is characterized by a variation in the width between a midpoint of the height of the opening and an endpoint of the opening that is less than or about 5 Å.
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公开(公告)号:US20220123114A1
公开(公告)日:2022-04-21
申请号:US17073060
申请日:2020-10-16
Applicant: Applied Materials, Inc.
Inventor: Akhil Singhal , Allison Yau , Sang-Jin Kim , Zeqiong Zhao , Zhijun Jiang , Deenesh Padhi , Ganesh Balasubramanian
IPC: H01L21/28 , H01L21/311 , H01L21/3213 , H01L29/423
Abstract: Exemplary semiconductor structures and processing methods may include forming a first portion of a first semiconductor layer characterized by a first etch rate for an etch treatment, forming a second portion of the first semiconductor layer characterized by a second etch rate that is less than the first etch rate for the etch treatment, and forming a third portion of the first semiconductor layer characterized by a third etch rate that is greater than the second etch rate. The processing methods may further include etching an opening through the first semiconductor layer, where the opening has a height and a width, and where the opening is characterized by a variation in the width between a midpoint of the height of the opening and an endpoint of the opening that is less than or about 5 Å
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公开(公告)号:US11784229B2
公开(公告)日:2023-10-10
申请号:US17073060
申请日:2020-10-16
Applicant: Applied Materials, Inc.
Inventor: Akhil Singhal , Allison Yau , Sang-Jin Kim , Zeqiong Zhao , Zhijun Jiang , Deenesh Padhi , Ganesh Balasubramanian
IPC: H01L21/28 , H01L21/3213 , H01L29/423 , H01L21/311
CPC classification number: H01L29/40114 , H01L21/31116 , H01L21/32137 , H01L29/42324
Abstract: Exemplary semiconductor structures and processing methods may include forming a first portion of a first semiconductor layer characterized by a first etch rate for an etch treatment, forming a second portion of the first semiconductor layer characterized by a second etch rate that is less than the first etch rate for the etch treatment, and forming a third portion of the first semiconductor layer characterized by a third etch rate that is greater than the second etch rate. The processing methods may further include etching an opening through the first semiconductor layer, where the opening has a height and a width, and where the opening is characterized by a variation in the width between a midpoint of the height of the opening and an endpoint of the opening that is less than or about 5 Å.
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公开(公告)号:US11646216B2
公开(公告)日:2023-05-09
申请号:US17073071
申请日:2020-10-16
Applicant: Applied Materials, Inc.
Inventor: Akhil Singhal , Allison Yau , Zeqiong Zhao , Sang-Jin Kim , Zhijun Jiang , Deenesh Padhi , Ganesh Balasubramanian
IPC: H01L21/683 , H02N13/00 , C25D7/00
CPC classification number: H01L21/6833 , C25D7/00 , H02N13/00
Abstract: Semiconductor processing systems and method are described that may include flowing deposition precursors into a substrate processing region of a semiconductor processing chamber, where the substrate processing region includes an electrostatic chuck. The methods may further include depositing a seasoning layer on the electrostatic chuck from the deposition precursors to form a seasoned electrostatic chuck. The seasoning layer may be characterized by a dielectric constant greater than or about 3.5. The methods may still further include applying a voltage to the seasoned electrostatic chuck of greater than or about 500 V. The seasoned electrostatic chuck may be characterized by a leakage current of less than or about 25 mA when the voltage is applied.
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公开(公告)号:US20230274968A1
公开(公告)日:2023-08-31
申请号:US18143895
申请日:2023-05-05
Applicant: Applied Materials, Inc.
Inventor: Akhil Singhal , Allison Yau , Zeqiong Zhao , Sang-Jin Kim , Zhijun Jiang , Deenesh Padhi , Ganesh Balasubramanian
IPC: H01L21/683 , H02N13/00 , C25D7/00
CPC classification number: H01L21/6833 , H02N13/00 , C25D7/00
Abstract: Semiconductor processing systems and method are described that may include flowing deposition precursors into a substrate processing region of a semiconductor processing chamber, where the substrate processing region includes an electrostatic chuck. The methods may further include depositing a seasoning layer on the electrostatic chuck from the deposition precursors to form a seasoned electrostatic chuck. The seasoning layer may be characterized by a dielectric constant greater than or about 3.5. The methods may still further include applying a voltage to the seasoned electrostatic chuck of greater than or about 500 V. The seasoned electrostatic chuck may be characterized by a leakage current of less than or about 25 mA when the voltage is applied.
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公开(公告)号:US20220122872A1
公开(公告)日:2022-04-21
申请号:US17073071
申请日:2020-10-16
Applicant: Applied Materials, Inc.
Inventor: Akhil Singhal , Allison Yau , Zeqiong Zhao , Sang-Jin Kim , Zhijun Jiang , Deenesh Padhi , Ganesh Balasubramanian
IPC: H01L21/683 , C25D7/00 , H02N13/00
Abstract: Semiconductor processing systems and method are described that may include flowing deposition precursors into a substrate processing region of a semiconductor processing chamber, where the substrate processing region includes an electrostatic chuck. The methods may further include depositing a seasoning layer on the electrostatic chuck from the deposition precursors to form a seasoned electrostatic chuck. The seasoning layer may be characterized by a dielectric constant greater than or about 3.5. The methods may still further include applying a voltage to the seasoned electrostatic chuck of greater than or about 500 V. The seasoned electrostatic chuck may be characterized by a leakage current of less than or about 25 mA when the voltage is applied.
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公开(公告)号:US12211908B2
公开(公告)日:2025-01-28
申请号:US18460290
申请日:2023-09-01
Applicant: Applied Materials, Inc.
Inventor: Akhil Singhal , Allison Yau , Sang-Jin Kim , Zeqiong Zhao , Zhijun Jiang , Deenesh Padhi , Ganesh Balasubramanian
IPC: H01L21/28 , H01L21/311 , H01L21/3213 , H01L29/423
Abstract: Exemplary semiconductor structures and processing methods may include forming a first portion of a first semiconductor layer characterized by a first etch rate for an etch treatment, forming a second portion of the first semiconductor layer characterized by a second etch rate that is less than the first etch rate for the etch treatment, and forming a third portion of the first semiconductor layer characterized by a third etch rate that is greater than the second etch rate. The processing methods may further include etching an opening through the first semiconductor layer, where the opening has a height and a width, and where the opening is characterized by a variation in the width between a midpoint of the height of the opening and an endpoint of the opening that is less than or about 5 Å.
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公开(公告)号:US20220336216A1
公开(公告)日:2022-10-20
申请号:US17235222
申请日:2021-04-20
Applicant: Applied Materials, Inc.
Inventor: Zeqiong Zhao , Allison Yau , Sang-Jin Kim , Akhil Singhal , Zhijun Jiang , Deenesh Padhi , Ganesh Balasubramanian
Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and an inert gas to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the silicon-containing precursor and the inert gas. The methods may include forming a plasma of all precursors within the processing region of a semiconductor processing chamber. The methods may include depositing a silicon-containing material on a substrate disposed within the processing region of the semiconductor processing chamber. The processing region may be maintained free of helium delivery during the deposition method.
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