INTEGRATED EPITAXY AND PRECLEAN SYSTEM

    公开(公告)号:US20220375751A1

    公开(公告)日:2022-11-24

    申请号:US17463966

    申请日:2021-09-01

    Abstract: Embodiments of the present disclosure generally relate to an integrated substrate processing system for cleaning a substrate surface and subsequently performing an epitaxial deposition process thereon. A processing system includes a film formation chamber, a transfer chamber coupled to the film formation chamber, and an oxide removal chamber coupled to the transfer chamber, the oxide removal chamber having a substrate support. The processing system includes a controller configured to introduce a process gas mixture into the oxide removal chamber, the process gas mixture including a fluorine-containing gas and a vapor including at least one of water, an alcohol, an organic acid, or combinations thereof. The controller is configured to expose a substrate positioned on the substrate support to the process gas mixture, thereby removing an oxide film from the substrate.

    Epitaxy of high tensile silicon alloy for tensile strain applications
    2.
    发明授权
    Epitaxy of high tensile silicon alloy for tensile strain applications 有权
    用于拉伸应变应用的高强度硅合金的外延

    公开(公告)号:US09460918B2

    公开(公告)日:2016-10-04

    申请号:US14133148

    申请日:2013-12-18

    Abstract: Embodiments of the present invention generally relate to methods for forming silicon epitaxial layers on semiconductor devices. The methods include forming a silicon epitaxial layer on a substrate at increased pressure and reduced temperature. The silicon epitaxial layer has a phosphorus concentration of about 1×1021 atoms per cubic centimeter or greater, and is formed without the addition of carbon. A phosphorus concentration of about 1×1021 atoms per cubic centimeter or greater increases the tensile strain of the deposited layer, and thus, improves channel mobility. Since the epitaxial layer is substantially free of carbon, the epitaxial layer does not suffer from film formation and quality issues commonly associated with carbon-containing epitaxial layers.

    Abstract translation: 本发明的实施例一般涉及在半导体器件上形成硅外延层的方法。 所述方法包括在增加的压力和降低的温度下在衬底上形成硅外延层。 硅外延层的磷浓度约为1×1021原子/立方厘米或更大,并且不添加碳形成。 大约1×1021原子/立方厘米或更大的磷浓度增加沉积层的拉伸应变,从而提高通道迁移率。 由于外延层基本上不含碳,外延层不会受到成膜和通常与含碳外延层相关的质量问题的影响。

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