公开(公告)号：US09431545B2

公开(公告)日：2016-08-30

申请号：US13604962

申请日：2012-09-06

Applicant: Toshihiko Saito ,  Atsuo Isobe ,  Kazuya Hanaoka ,  Junichi Koezuka ,  Shinya Sasagawa ,  Motomu Kurata ,  Akihiro Ishizuka

Inventor： Toshihiko Saito ,  Atsuo Isobe ,  Kazuya Hanaoka ,  Junichi Koezuka ,  Shinya Sasagawa ,  Motomu Kurata ,  Akihiro Ishizuka

IPC: H01L29/786 ,  H01L21/28 ,  H01L27/12

CPC classification number: H01L29/7869 ,  H01L27/1225

Abstract: A miniaturized transistor having high electric characteristics is provided with high yield. In a semiconductor device including the transistor, high performance, high reliability, and high productivity are achieved. In a semiconductor device including a transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode layer on side surfaces of which sidewall insulating layers are provided are stacked in this order, source and drain electrode layers are provided in contact with the oxide semiconductor film and the sidewall insulating layers. In a process for manufacturing the semiconductor device, a conductive film and an interlayer insulating film are stacked to cover the oxide semiconductor film, the sidewall insulating layers, and the gate electrode layer, and the interlayer insulating film and the conductive film over the gate electrode layer are removed by a chemical mechanical polishing method, so that the source and drain electrode layers are formed.

Abstract translation: 提供具有高电特性的小型化晶体管，其产率高。 在包括晶体管的半导体器件中，实现了高性能，高可靠性和高生产率。 在包括晶体管的半导体器件中，依次堆叠其中设置有侧壁绝缘层的侧表面上的氧化物半导体膜，栅极绝缘膜和栅极电极层的晶体管，源极和漏极电极层被设置为与 氧化物半导体膜和侧壁绝缘层。 在制造半导体器件的过程中，层叠导电膜和层间绝缘膜以覆盖氧化物半导体膜，侧壁绝缘层和栅极电极层，以及栅极上的层间绝缘膜和导电膜 通过化学机械抛光方法去除层，从而形成源极和漏极电极层。

公开(公告)号：US09111795B2

公开(公告)日：2015-08-18

申请号：US13444124

申请日：2012-04-11

Applicant: Yoshinori Ieda ,  Atsuo Isobe ,  Yutaka Shionoiri ,  Tomoaki Atsumi

Inventor： Yoshinori Ieda ,  Atsuo Isobe ,  Yutaka Shionoiri ,  Tomoaki Atsumi

IPC: H01L27/108 ,  H01L27/115 ,  H01L27/105 ,  H01L49/02 ,  H01L27/12

CPC classification number: H01L27/1207 ,  H01L27/092 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/10805 ,  H01L27/115 ,  H01L27/11551 ,  H01L27/1156 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/1259 ,  H01L28/40 ,  H01L29/04 ,  H01L29/16 ,  H01L29/24 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/78 ,  H01L29/78648 ,  H01L29/7869

Abstract: Provided is a semiconductor device which has low power consumption and can operate at high speed. The semiconductor device includes a memory element including a first transistor including crystalline silicon in a channel formation region, a capacitor for storing data of the memory element, and a second transistor which is a switching element for controlling supply, storage, and release of charge in the capacitor. The second transistor is provided over an insulating film covering the first transistor. The first and second transistors have a source electrode or a drain electrode in common.

Abstract translation: 提供具有低功耗并且可以高速运行的半导体器件。 半导体器件包括：存储元件，其包括在沟道形成区域中包括晶体硅的第一晶体管，用于存储存储元件的数据的电容器;以及第二晶体管，其是用于控制电荷的供应，存储和释放的开关元件 电容器。 第二晶体管设置在覆盖第一晶体管的绝缘膜上。 第一和第二晶体管共同地具有源电极或漏电极。

公开(公告)号：US09006803B2

公开(公告)日：2015-04-14

申请号：US13446028

申请日：2012-04-13

Applicant: Atsuo Isobe ,  Toshinari Sasaki ,  Shinya Sasagawa ,  Akihiro Ishizuka

Inventor： Atsuo Isobe ,  Toshinari Sasaki ,  Shinya Sasagawa ,  Akihiro Ishizuka

IPC: H01L29/76 ,  H01L27/06 ,  H01L27/12 ,  H01L29/786 ,  H01L29/423 ,  H01L29/66 ,  H01L21/02

CPC classification number: H01L29/66969 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02667 ,  H01L27/0688 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/78603 ,  H01L29/78642 ,  H01L29/7869 ,  H01L29/78696

Abstract: An insulating layer is provided with a projecting structural body, and a channel formation region of an oxide semiconductor layer is provided in contact with the projecting structural body, whereby the channel formation region is extended in a three dimensional direction (a direction perpendicular to a substrate). Thus, it is possible to miniaturize a transistor and to extend an effective channel length of the transistor. Further, an upper end corner portion of the projecting structural body, where a top surface and a side surface of the projecting structural body intersect with each other, is curved, and the oxide semiconductor layer is formed to include a crystal having a c-axis perpendicular to the curved surface.

Abstract translation: 绝缘层设置有突出的结构体，并且设置与突出结构体接触的氧化物半导体层的沟道形成区域，由此沟道形成区域沿三维方向（垂直于衬底的方向）延伸 ）。 因此，可以使晶体管小型化并且延长晶体管的有效沟道长度。 此外，突出结构体的顶表面和侧表面彼此相交的突出结构体的上端角部弯曲，并且氧化物半导体层形成为包括具有c轴的晶体 垂直于曲面。

公开(公告)号：US08952379B2

公开(公告)日：2015-02-10

申请号：US13608044

申请日：2012-09-10

Applicant: Shunpei Yamazaki ,  Atsuo Isobe ,  Hiromachi Godo ,  Takehisa Hatano ,  Sachiaki Tezuka ,  Suguru Hondo ,  Naoto Yamade ,  Junichi Koezuka

Inventor： Shunpei Yamazaki ,  Atsuo Isobe ,  Hiromachi Godo ,  Takehisa Hatano ,  Sachiaki Tezuka ,  Suguru Hondo ,  Naoto Yamade ,  Junichi Koezuka

IPC: H01L29/78 ,  H01L29/417 ,  H01L29/786

CPC classification number: H01L29/41733 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78693

Abstract: Provided is a semiconductor device in which an oxide semiconductor layer is provided; a pair of wiring layers which are provided with the gate electrode layer interposed therebetween are electrically connected to the low-resistance regions; and electrode layers are provided to be in contact with the low-resistance regions, below regions where the wiring layers are formed.

Abstract translation: 提供一种半导体器件，其中提供氧化物半导体层; 设置有栅极电极层的一对布线层电连接到低电阻区域; 并且电极层设置成与低电阻区域接触，在形成布线层的区域之下。

公开(公告)号：US08841675B2

公开(公告)日：2014-09-23

申请号：US13609931

申请日：2012-09-11

Applicant: Toshihiko Saito ,  Atsuo Isobe ,  Kazuya Hanaoka ,  Sho Nagamatsu

Inventor： Toshihiko Saito ,  Atsuo Isobe ,  Kazuya Hanaoka ,  Sho Nagamatsu

IPC: H01L29/10 ,  H01L29/76 ,  H01L27/108 ,  H01L29/04 ,  H01L27/12 ,  H01L29/786 ,  H01L29/78

CPC classification number: H01L29/66969 ,  H01L21/02565 ,  H01L21/44 ,  H01L21/463 ,  H01L21/465 ,  H01L27/1225 ,  H01L27/14632 ,  H01L27/14687 ,  H01L29/04 ,  H01L29/78 ,  H01L29/7869

Abstract: A minute transistor and the method of manufacturing the minute transistor. A source electrode layer and a drain electrode layer are each formed in a corresponding opening formed in an insulating layer covering a semiconductor layer. The opening of the source electrode layer and the opening of the drain electrode layer are formed separately in two distinct steps. The source electrode layer and the drain electrode layer are formed by depositing a conductive layer over the insulating layer and in the openings, and subsequently removing the part located over the insulating layer by polishing. This manufacturing method allows for the source electrode later and the drain electrode layer to be formed close to each other and close to a channel forming region of the semiconductor layer. Such a structure leads to a transistor having high electrical characteristics and a high manufacturing yield even in the case of a minute structure.

Abstract translation: 一分钟晶体管和微晶体管的制造方法。 源极电极层和漏极电极层各自形成在形成在覆盖半导体层的绝缘层中的对应的开口中。 源电极层的开口和漏电极层的开口分开形成两个不同的步骤。 源极电极层和漏电极层通过在绝缘层上和开口中沉积导电层而形成，然后通过抛光去除位于绝缘层之上的部分。 该制造方法允许稍后的源极电极和漏极电极层彼此靠近并且靠近半导体层的沟道形成区域。 这种结构导致即使在微小结构的情况下也具有高电特性和高制造成品率的晶体管。

公开(公告)号：US08779433B2

公开(公告)日：2014-07-15

申请号：US13115239

申请日：2011-05-25

Applicant: Atsuo Isobe ,  Yoshinori Ieda ,  Kiyoshi Kato ,  Yuto Yakubo ,  Yuki Hata

Inventor： Atsuo Isobe ,  Yoshinori Ieda ,  Kiyoshi Kato ,  Yuto Yakubo ,  Yuki Hata

IPC: H01L29/10 ,  H01L27/115 ,  H01L27/108

CPC classification number: H01L27/10852 ,  G11C16/0433 ,  H01L27/11521 ,  H01L27/1156 ,  H01L27/1225

Abstract: It is an object to provide a semiconductor device with a novel structure in which stored data can be held even when power is not supplied and there is no limitation on the number of writings. A semiconductor device includes a second transistor and a capacitor provided over a first transistor. A source electrode of the second transistor which is in contact with a gate electrode of the first transistor is formed using a material having etching selectivity with respect to the gate electrode. By forming the source electrode of the second transistor using a material having etching selectivity with respect to the gate electrode of the first transistor, a margin in layout can be reduced, so that the degree of integration of the semiconductor device can be increased.

Abstract translation: 本发明的目的是提供一种具有新颖结构的半导体器件，其中即使在不提供电力的情况下也可以保持存储的数据，并且对写入数量没有限制。 半导体器件包括设置在第一晶体管上的第二晶体管和电容器。 使用具有相对于栅电极的蚀刻选择性的材料形成与第一晶体管的栅电极接触的第二晶体管的源电极。 通过使用相对于第一晶体管的栅电极具有蚀刻选择性的材料形成第二晶体管的源电极，可以减小布局的裕度，从而可以提高半导体器件的集成度。

公开(公告)号：US08343816B2

公开(公告)日：2013-01-01

申请号：US12850652

申请日：2010-08-05

Applicant: Ryota Imahayashi ,  Shinobu Furukawa ,  Atsuo Isobe ,  Yasuyuki Arai ,  Shunpei Yamazaki

Inventor： Ryota Imahayashi ,  Shinobu Furukawa ,  Atsuo Isobe ,  Yasuyuki Arai ,  Shunpei Yamazaki

IPC: H01L21/00

CPC classification number: H01L51/0512 ,  H01L21/02175 ,  H01L21/02244 ,  H01L21/02247 ,  H01L21/02252 ,  H01L21/31683 ,  H01L51/0002 ,  H01L51/0055 ,  H01L51/0525 ,  H01L51/0541 ,  H01L51/0545 ,  H01L51/0566

Abstract: It is an object to form a high quality gate insulating film which is dense and has a strong insulation resistance property, and to propose a high reliable organic transistor in which a tunnel leakage current is little. One mode of the organic transistor of the present invention has a step of forming the gate insulating film by forming the conductive layer which becomes the gate electrode activating oxygen (or gas including oxygen) or nitrogen (or gas including nitrogen) or the like using dense plasma in which density of electron is 1011 cm−3 or more, and electron temperature is a range of 0.2 eV to 2.0 eV with plasma activation, and reacting directly with a portion of the conductive layer which becomes the gate electrode to be insulated.

Abstract translation: 本发明的目的是形成致密且具有很强绝缘电阻特性的高质量栅极绝缘膜，并且提出了隧道泄漏电流很小的高可靠性有机晶体管。 本发明的有机晶体管的一种模式具有如下步骤：通过使用密集的方法形成作为活化氧（或含氧气体）或氮（或含氮气体）的栅极的导电层形成栅极绝缘膜 电子密度为1011cm -3以上的等离子体，等离子体活化时电子温度为0.2eV〜2.0eV的范围，直接与成为要被绝缘的栅电极的导体层的一部分反应。

公开(公告)号：US08304313B2

公开(公告)日：2012-11-06

申请号：US10585128

申请日：2005-08-12

Applicant: Koichiro Tanaka ,  Atsuo Isobe ,  Yoshiaki Yamamoto

Inventor： Koichiro Tanaka ,  Atsuo Isobe ,  Yoshiaki Yamamoto

IPC: H01L21/8236

CPC classification number: H01L29/78648 ,  B23K26/0604 ,  B23K26/066 ,  H01L21/268 ,  H01L27/1296 ,  H01L29/78621 ,  H01L2029/7863

Abstract: It is an object of the present invention to provide laser irradiation apparatus and method which can decrease the proportion of the microcrystal region in the whole irradiated region and can irradiate a semiconductor film homogeneously with a laser beam. A low-intensity part of a laser beam emitted from a laser oscillator is blocked by a slit, the laser beam is deflected by a mirror, and the beam is shaped into a desired size by using two convex cylindrical lenses. Then, the laser beam is delivered to the irradiation surface.

Abstract translation: 本发明的目的是提供一种激光照射装置和方法，该激光照射装置和方法可以降低整个照射区域中的微晶区域的比例，并且可以用激光束均匀地照射半导体膜。 从激光振荡器发射的激光束的低强度部分被狭缝阻挡，激光束被反射镜偏转，并且通过使用两个凸柱面透镜将光束成形为期望的尺寸。 然后，激光束被传送到照​​射表面。

公开(公告)号：US20120214259A1

公开(公告)日：2012-08-23

申请号：US13213458

申请日：2011-08-19

Applicant: Yutaka Okazaki ,  Keitaro Imai ,  Atsuo Isobe ,  Shunpei Yamazaki

Inventor： Yutaka Okazaki ,  Keitaro Imai ,  Atsuo Isobe ,  Shunpei Yamazaki

IPC: H01L21/66

CPC classification number: G01N23/2258 ,  G01N2223/611

Abstract: Experience shows that, in a material containing oxygen as a main component, an excess or deficiency of trace amounts of oxygen with respect to a stoichiometric composition, or the like affects properties of the material. An oxygen diffusion evaluation method of an oxide film stacked body includes the steps of: measuring a quantitative value of one of oxygen isotopes of a substrate including a first oxide film and a second oxide film which has an existence proportion of an oxygen isotope different from an existence proportion of an oxygen isotope in the first oxide film in a depth direction, by secondary ion mass spectrometry; and evaluating the one of the oxygen isotopes diffused from the first oxide film to the second oxide film.

Abstract translation: 经验表明，在含氧作为主要成分的材料中，相对于化学计量组成等的痕量氧的过量或不足影响材料的性能。 氧化膜层叠体的氧扩散评价方法包括以下步骤：测量包含第一氧化物膜和第二氧化物膜的基板的氧同位素的定量值，所述氧化物存在比例与氧同位素 通过二次离子质谱法在深度方向上在第一氧化膜中的氧同位素的存在比例; 并评估从第一氧化物膜扩散到第二氧化物膜的氧同位素中的一种。

公开(公告)号：US08049253B2

公开(公告)日：2011-11-01

申请号：US12216567

申请日：2008-07-08

Applicant: Atsuo Isobe

Inventor： Atsuo Isobe

IPC: H01L27/08 ,  H01L21/30

CPC classification number: H01L27/088 ,  H01L21/823807 ,  H01L21/84 ,  H01L27/0688 ,  H01L27/1203 ,  H01L29/78603

Abstract: A semiconductor device and a method for manufacturing a semiconductor device are provided. A semiconductor device comprises a first single-crystal semiconductor layer including a first channel formation region and a first impurity region over a substrate having an insulating surface, a first gate insulating layer over the first single-crystal semiconductor layer, a gate electrode over the first gate insulating layer, a first interlayer insulating layer over the first gate insulating layer, a second gate insulating layer over the gate electrode and the first interlayer insulating layer, and a second single-crystal semiconductor layer including a second channel formation region and a second impurity region over the second gate insulating layer. The first channel formation region, the gate electrode, and the second channel formation region are overlapped with each other.

Abstract translation: 提供半导体器件和半导体器件的制造方法。 半导体器件包括：第一单晶半导体层，包括在具有绝缘表面的衬底上的第一沟道形成区和第一杂质区;在第一单晶半导体层上方的第一栅绝缘层，第一单晶半导体层上的栅电极 栅极绝缘层，第一栅极绝缘层上的第一层间绝缘层，栅极电极和第一层间绝缘层之上的第二栅极绝缘层，以及包括第二沟道形成区域和第二杂质的第二单晶半导体层 区域。 第一沟道形成区域，栅极电极和第二沟道形成区域彼此重叠。