公开(公告)号：US20210074595A1

公开(公告)日：2021-03-11

申请号：US16564676

申请日：2019-09-09

Applicant: BAE Systems Information and Electronic Systems Integration Inc.

Inventor： Jeffrey A. Zimmerman ,  Landon J. Caley ,  Richard J. Ferguson

IPC: H01L21/66 ,  H01L21/48 ,  H05K3/22 ,  C23C14/22 ,  C23C14/14

Abstract: A method for modifying an LGA package after production is described herein. Generally, a modification of an LGA package by shorting two contacts together via a trace made of a robust conductive metal such as tungsten or platinum. Specifically, the present disclosure relates to a method for modifying a LGA package shorting two contacts together using FIB deposition via a gallium ion beam.

公开(公告)号：US11139217B2

公开(公告)日：2021-10-05

申请号：US16564676

申请日：2019-09-09

Applicant: BAE Systems Information and Electronic Systems Integration Inc.

Inventor： Jeffrey A. Zimmerman ,  Landon J. Caley ,  Richard J. Ferguson

IPC: C23C16/48 ,  H01L21/66 ,  H01L21/48 ,  H05K3/22 ,  C23C14/14 ,  C23C14/22 ,  C23C16/04 ,  C23C16/06 ,  B05D5/12

Abstract: A method for modifying a portion of a substrate after production is described herein. The method can include diagnosing a circuit operation error causing a malfunction, identifying a first contact on the substrate, and connecting, electrically, the first contact to a second contact with at least one trace. The trace is done with a focused ion beam. The method can include diagnosing an error on an operative area of a post-manufacture circuit board causing a malfunction; introducing a metal precursor into a focused ion beam chamber; ionizing the metal precursor by contacting it with a gallium ion beam into a conductive metal and a further ion; depositing a first portion of a conductive metal onto a substrate to form a first trace; and forming the first trace between the operative area and a non-operative area thereby connecting the operative area and the non-operative area.

公开(公告)号：US20210257999A1

公开(公告)日：2021-08-19

申请号：US17307596

申请日：2021-05-04

Applicant: BAE Systems Information and Electronic Systems Integration Inc.

Inventor： Bin Li ,  David Bostedo ,  Landon J. Caley ,  Nicholas J. Chiolino ,  Patrick Fleming ,  David D. Moser

IPC: H03K3/3562 ,  H03K19/003

Abstract: A flip-flop and latch circuit is disclosed. The circuit includes a single-input inverter, a dual-input inverter, a single-input tri-state inverter, a dual-input tri-state inverter, and two single-event transient (SET) filters. The single-input tri-state inverter receives an input signal D. The dual-input tri-state inverter includes a first input, a second input and an output, wherein the first input receives output signals from the dual-input inverter and the second input receives output signals from the dual-input inverter via the first SET filter. The output of the dual-input tri-state inverter sends output signals to a first input of the dual-input inverter and a second input of the dual-input inverter via the second SET filter. The single-input inverter receives inputs from the dual-input inverter to provide an output signal Q for the circuit