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公开(公告)号：US20150342040A1
公开(公告)日：2015-11-26
申请号：US14450297
申请日：2014-08-04
Applicant: Chao-Min Wang
Inventor： Chao-Min Wang
CPC classification number: H05K1/0313 , H01L21/48 , H01L21/486 , H01L21/6835 , H01L23/498 , H01L23/49827 , H01L2221/68318 , H01L2924/15151 , H05K1/0298 , H05K1/114 , H05K1/115 , H05K3/007 , H05K3/46 , H05K2201/0145 , H05K2201/0154 , H05K2201/035 , H05K2201/0355 , H05K2201/09063 , H05K2203/0214 , H05K2203/1178 , Y10T156/10
Abstract: A substrate structure is provided. The substrate structure includes a substrate and a carrier. The substrate includes a first through hole, a first surface and a second surface opposite to the first surface. The first through hole penetrates the substrate for connecting the first surface and the second surface. The carrier includes a second through hole, a release layer, an insulating paste layer and a metal layer. The insulating paste layer is disposed between the release layer and the metal layer. The carrier is attached to the second surface with the release layer thereof. The second through hole corresponds to the first through hole and penetrates the carrier for exposing the first through hole.
Abstract translation: 提供了基板结构。 衬底结构包括衬底和载体。 基板包括第一通孔，第一表面和与第一表面相对的第二表面。 第一通孔贯穿基板，用于连接第一表面和第二表面。 载体包括第二通孔，释放层，绝缘膏层和金属层。 绝缘膏层设置在剥离层和金属层之间。 载体用其释放层附着到第二表面。 第二通孔对应于第一通孔并穿透载体以暴露第一通孔。
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公开(公告)号：US08991043B2
公开(公告)日：2015-03-31
申请号：US13553787
申请日：2012-07-19
Applicant: Chao-Min Wang
Inventor： Chao-Min Wang
CPC classification number: H05K3/244 , H05K3/108 , H05K3/4652 , H05K2203/0361 , H05K2203/0574 , H05K2203/1461 , H05K2203/1572 , Y10T29/49117 , Y10T29/49124 , Y10T29/49126 , Y10T29/4913 , Y10T29/49144 , Y10T29/49165
Abstract: A circuit board structure includes a core circuit structure, a first and a second dielectric layers, a first and a second conductive blind via structures, a third and a fourth patterned circuit layers, and a first and a second surface passivation layers. The first and the second dielectric layers have at least one first and second blind vias exposing parts of a first and a second patterned circuit layers of the core circuit structure, respectively. The first and the second conductive blind via structures are disposed into the first and the second blind vias respectively. The third and the fourth patterned circuit layers are electrically connected to the first and the second patterned circuit layers through the first and the second conductive blind via structures respectively. The first and the second surface passivation layers respectively expose parts of the third and the fourth patterned circuit layers.
Abstract translation: 电路板结构包括核心电路结构，第一和第二电介质层，第一和第二导电盲孔结构，第三和第四图案化电路层以及第一和第二表面钝化层。 第一和第二介电层分别具有暴露核心电路结构的第一和第二图案化电路层的部分的至少一个第一和第二盲孔。 第一和第二导电盲通孔结构分别设置在第一和第二盲孔中。 第三和第四图案化电路层分别通过第一和第二导电盲孔结构电连接到第一和第二图案化电路层。 第一和第二表面钝化层分别暴露第三和第四图案化电路层的部分。
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公开(公告)号：US09538647B2
公开(公告)日：2017-01-03
申请号：US14450297
申请日：2014-08-04
Applicant: Chao-Min Wang
Inventor： Chao-Min Wang
CPC classification number: H05K1/0313 , H01L21/48 , H01L21/486 , H01L21/6835 , H01L23/498 , H01L23/49827 , H01L2221/68318 , H01L2924/15151 , H05K1/0298 , H05K1/114 , H05K1/115 , H05K3/007 , H05K3/46 , H05K2201/0145 , H05K2201/0154 , H05K2201/035 , H05K2201/0355 , H05K2201/09063 , H05K2203/0214 , H05K2203/1178 , Y10T156/10
Abstract: A substrate structure is provided. The substrate structure includes a substrate and a carrier. The substrate includes a first through hole, a first surface and a second surface opposite to the first surface. The first through hole penetrates the substrate for connecting the first surface and the second surface. The carrier includes a second through hole, a release layer, an insulating paste layer and a metal layer. The insulating paste layer is disposed between the release layer and the metal layer. The carrier is attached to the second surface with the release layer thereof. The second through hole corresponds to the first through hole and penetrates the carrier for exposing the first through hole.
Abstract translation: 提供了基板结构。 衬底结构包括衬底和载体。 基板包括第一通孔，第一表面和与第一表面相对的第二表面。 第一通孔贯穿基板，用于连接第一表面和第二表面。 载体包括第二通孔，释放层，绝缘膏层和金属层。 绝缘膏层设置在剥离层和金属层之间。 载体用其释放层附着到第二表面。 第二通孔对应于第一通孔并穿透载体以暴露第一通孔。
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公开(公告)号：US09433099B2
公开(公告)日：2016-08-30
申请号：US14072803
申请日：2013-11-06
Applicant: Chin-Sheng Wang , Ching-Sheng Chen , Chao-Min Wang
Inventor： Chin-Sheng Wang , Ching-Sheng Chen , Chao-Min Wang
CPC classification number: H05K3/007 , H01L2224/48091 , H01L2224/48228 , H01L2924/15311 , H05K3/3452 , H05K2201/0376 , H05K2203/0156 , H01L2924/00014
Abstract: A package carrier including a removable supporting plate and a circuit board is provided. The removable supporting plate includes a dielectric layer, a copper foil layer and a releasing layer. The dielectric layer is disposed between the copper foil layer and the releasing layer. The circuit board is disposed on the removable supporting plate and directly contacts the releasing layer. A thickness of the circuit board is between 30 μm and 100 μm.
Abstract translation: 提供一种包括可拆卸支撑板和电路板的封装载体。 可移除的支撑板包括介电层，铜箔层和释放层。 介电层设置在铜箔层和释放层之间。 电路板设置在可拆卸的支撑板上并直接接触释放层。 电路板的厚度在30μm和100μm之间。
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公开(公告)号：US09282643B2
公开(公告)日：2016-03-08
申请号：US14200046
申请日：2014-03-07
Applicant: Chin-Sheng Wang , Chao-Min Wang
Inventor： Chin-Sheng Wang , Chao-Min Wang
CPC classification number: H05K3/007 , H01L31/0392 , H01L33/0079 , H05K3/0097 , H05K3/188 , H05K2201/0376 , H05K2203/1536
Abstract: A core substrate includes a dielectric layer, at least one releasing layer, at least one first copper foil layer and at least one nickel layer. The releasing layer is disposed on the dielectric layer and directly covers the dielectric layer. The first copper foil layer is disposed on the releasing layer and directly covers the releasing layer. The nickel layer is disposed on the first copper foil layer and directly covers the first copper foil layer.
Abstract translation: 核心基板包括电介质层，至少一个释放层，至少一个第一铜箔层和至少一个镍层。 释放层设置在电介质层上并直接覆盖电介质层。 第一铜箔层设置在释放层上并直接覆盖释放层。 镍层设置在第一铜箔层上并直接覆盖第一铜箔层。
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Patent Agency Ranking
公开(公告)号：US09204546B2
公开(公告)日：2015-12-01
申请号：US14181739
申请日：2014-02-17
Applicant: Chin-Sheng Wang , Ching-Sheng Chen , Chun-Kai Lin , Chao-Min Wang
Inventor： Chin-Sheng Wang , Ching-Sheng Chen , Chun-Kai Lin , Chao-Min Wang
CPC classification number: H05K1/113 , H05K1/115 , H05K3/0097 , H05K3/4007 , H05K2201/0376 , H05K2201/09509 , H05K2201/0959 , H05K2203/0152 , H05K2203/0156 , H05K2203/1536 , H05K2203/1563 , Y10T29/49165
Abstract: A circuit board includes a circuit layer, a first solder resist layer, a second solder resist layer and at least one conductive bump. The first solder resist layer is disposed on a lower surface of the circuit layer and has at least one first opening exposing a portion of the lower surface of the circuit layer. The second solder resist layer is disposed on an upper surface of the circuit layer and has at least one second opening exposing a portion of the upper surface of the circuit layer. The conductive bump is disposed inside the second opening of the second solder resist layer and directly connects to the upper surface of the circuit layer exposed by the second opening. A top surface of the conductive bump is higher than a second surface of the second solder resist layer.
Abstract translation: 电路板包括电路层，第一阻焊层，第二阻焊层和至少一个导电凸块。 第一阻焊层设置在电路层的下表面上，并且具有暴露电路层的下表面的一部分的至少一个第一开口。 第二阻焊层设置在电路层的上表面上，并且具有暴露电路层的上表面的一部分的至少一个第二开口。 导电凸块设置在第二阻焊层的第二开口内，并且直接连接到由第二开口暴露的电路层的上表面。 导电凸块的顶表面高于第二阻焊层的第二表面。
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公开(公告)号：US20150313007A1
公开(公告)日：2015-10-29
申请号：US14447575
申请日：2014-07-30
Applicant: Chao-Min Wang
Inventor： Chao-Min Wang
CPC classification number: H01L23/49822 , H01L21/4857 , H01L21/6835 , H01L23/13 , H01L23/49838 , H01L23/49866 , H01L2221/68345 , H01L2221/68381 , H05K1/0296 , H05K1/0298 , H05K1/09 , H05K3/0058 , H05K3/0061 , H05K3/048 , H05K3/06 , H05K3/064 , H05K3/14 , H05K3/4652 , H05K3/4682 , H05K2201/0145 , H05K2203/0152 , H05K2203/0502 , H05K2203/0548 , H05K2203/066
Abstract: A manufacturing method of a substrate structure includes the following steps. A substrate including a supporting layer, two release layers and two base metal layers is provided. The release layers are disposed on two opposite surfaces of the supporting layer respectively. Each base metal layer covers each of the release layers. A first patterned solder-resist layer is formed on each of the base metal layers. A stacking layer is laminated on each of the base metal layers to cover each of the first patterned solder-resist layers. Each stacking layer includes a dielectric layer and a metal foil. Each dielectric layer is disposed between the corresponding base metal layer and the corresponding metal foil. Each base metal layer is separated from the supporting layer. Each base metal layer is patterned to form a patterned metal layer on each stacking layer. Each patterned metal layer exposes the corresponding first patterned solder-resist layer.
Abstract translation: 衬底结构的制造方法包括以下步骤。 提供了包括支撑层，两个释放层和两个基底金属层的基板。 剥离层分别设置在支撑层的两个相对的表面上。 每个基底金属层覆盖每个释放层。 在每个基底金属层上形成第一图案化的阻焊层。 在每个基底金属层上层叠堆叠层以覆盖每个第一图案化阻焊层。 每个堆叠层包括电介质层和金属箔。 每个电介质层设置在相应的基底金属层和相应的金属箔之间。 每个基底金属层与支撑层分离。 每个基底金属层被图案化以在每个堆叠层上形成图案化的金属层。 每个图案化的金属层暴露相应的第一图案化的阻焊层。
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公开(公告)号：US20150092358A1
公开(公告)日：2015-04-02
申请号：US14072803
申请日：2013-11-06
Applicant: Chin-Sheng Wang , Ching-Sheng Chen , Chao-Min Wang
Inventor： Chin-Sheng Wang , Ching-Sheng Chen , Chao-Min Wang
IPC: H05K1/11
CPC classification number: H05K3/007 , H01L2224/48091 , H01L2224/48228 , H01L2924/15311 , H05K3/3452 , H05K2201/0376 , H05K2203/0156 , H01L2924/00014
Abstract: A package carrier including a removable supporting plate and a circuit board is provided. The removable supporting plate includes a dielectric layer, a copper foil layer and a releasing layer. The dielectric layer is disposed between the copper foil layer and the releasing layer. The circuit board is disposed on the removable supporting plate and directly contacts the releasing layer. A thickness of the circuit board is between 30 μm and 100 μm.
Abstract translation: 提供一种包括可拆卸支撑板和电路板的封装载体。 可移除的支撑板包括介电层，铜箔层和释放层。 介电层设置在铜箔层和释放层之间。 电路板设置在可拆卸的支撑板上并直接接触释放层。 电路板的厚度在30μm和100μm之间。
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公开(公告)号：US09313886B2
公开(公告)日：2016-04-12
申请号：US14447575
申请日：2014-07-30
Applicant: Chao-Min Wang
Inventor： Chao-Min Wang
CPC classification number: H01L23/49822 , H01L21/4857 , H01L21/6835 , H01L23/13 , H01L23/49838 , H01L23/49866 , H01L2221/68345 , H01L2221/68381 , H05K1/0296 , H05K1/0298 , H05K1/09 , H05K3/0058 , H05K3/0061 , H05K3/048 , H05K3/06 , H05K3/064 , H05K3/14 , H05K3/4652 , H05K3/4682 , H05K2201/0145 , H05K2203/0152 , H05K2203/0502 , H05K2203/0548 , H05K2203/066
Abstract: A manufacturing method of a substrate structure includes the following steps. A substrate including a supporting layer, two release layers and two base metal layers is provided. The release layers are disposed on two opposite surfaces of the supporting layer respectively. Each base metal layer covers each of the release layers. A first patterned solder-resist layer is formed on each of the base metal layers. A stacking layer is laminated on each of the base metal layers to cover each of the first patterned solder-resist layers. Each stacking layer includes a dielectric layer and a metal foil. Each dielectric layer is disposed between the corresponding base metal layer and the corresponding metal foil. Each base metal layer is separated from the supporting layer. Each base metal layer is patterned to form a patterned metal layer on each stacking layer. Each patterned metal layer exposes the corresponding first patterned solder-resist layer.
Abstract translation: 衬底结构的制造方法包括以下步骤。 提供了包括支撑层，两个释放层和两个基底金属层的基板。 剥离层分别设置在支撑层的两个相对的表面上。 每个基底金属层覆盖每个释放层。 在每个基底金属层上形成第一图案化的阻焊层。 在每个基底金属层上层叠堆叠层以覆盖每个第一图案化阻焊层。 每个堆叠层包括电介质层和金属箔。 每个电介质层设置在相应的基底金属层和相应的金属箔之间。 每个基底金属层与支撑层分离。 每个基底金属层被图案化以在每个堆叠层上形成图案化的金属层。 每个图案化的金属层暴露相应的第一图案化的阻焊层。
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公开(公告)号：US20150195917A1
公开(公告)日：2015-07-09
申请号：US14200046
申请日：2014-03-07
Applicant: Chin-Sheng Wang , Chao-Min Wang
Inventor： Chin-Sheng Wang , Chao-Min Wang
CPC classification number: H05K3/007 , H01L31/0392 , H01L33/0079 , H05K3/0097 , H05K3/188 , H05K2201/0376 , H05K2203/1536
Abstract: A core substrate includes a dielectric layer, at least one releasing layer, at least one first copper foil layer and at least one nickel layer. The releasing layer is disposed on the dielectric layer and directly covers the dielectric layer. The first copper foil layer is disposed on the releasing layer and directly covers the releasing layer. The nickel layer is disposed on the first copper foil layer and directly covers the first copper foil layer.
Abstract translation: 核心基板包括电介质层，至少一个释放层，至少一个第一铜箔层和至少一个镍层。 释放层设置在电介质层上并直接覆盖电介质层。 第一铜箔层设置在释放层上并直接覆盖释放层。 镍层设置在第一铜箔层上并直接覆盖第一铜箔层。
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