公开(公告)号：US08080443B2

公开(公告)日：2011-12-20

申请号：US12289396

申请日：2008-10-27

Applicant: Yung-Tin Chen ,  Chun-Ming Wang ,  Steven J. Radigan

Inventor： Yung-Tin Chen ,  Chun-Ming Wang ,  Steven J. Radigan

IPC: H01L21/44

CPC classification number: H01L21/0337

Abstract: A method of making a device includes forming a first hard mask layer over an underlying layer, forming first features over the first hard mask layer, forming a first spacer layer over the first features, etching the first spacer layer to form a first spacer pattern and to expose top of the first features, removing the first features, patterning the first hard mask using the first spacer pattern as a mask to form first hard mask features, removing the first spacer pattern. The method also includes forming second features over the first hard mask features, forming a second spacer layer over the second features, etching the second spacer layer to form a second spacer pattern and to expose top of the second features, removing the second features, etching the first hard mask features using the second spacer pattern as a mask to form second hard mask features, and etching at least part of the underlying layer using the second hard mask features as a mask.

Abstract translation: 制造器件的方法包括在下层上形成第一硬掩模层，在第一硬掩模层上形成第一特征，在第一特征上形成第一间隔层，蚀刻第一间隔层以形成第一间隔图案， 为了暴露第一特征的顶部，去除第一特征，使用第一间隔图案作为掩模来图案化第一硬掩模以形成第一硬掩模特征，去除第一间隔图案。 该方法还包括在第一硬掩模特征上形成第二特征，在第二特征上形成第二间隔层，蚀刻第二间隔层以形成第二间隔图案并暴露第二特征的顶部，去除第二特征，蚀刻 第一硬掩模使用第二间隔图案作为掩模形成第二硬掩模特征，并且使用第二硬掩模特征作为掩模蚀刻至少部分下层。

公开(公告)号：US20110229805A1

公开(公告)日：2011-09-22

申请号：US12729088

申请日：2010-03-22

Applicant: Chun-Ming Wang ,  Chen-Che Huang ,  Masaaki Higashitani

Inventor： Chun-Ming Wang ,  Chen-Che Huang ,  Masaaki Higashitani

IPC: G03F1/00 ,  H01L21/027

CPC classification number: G03F1/36

Abstract: A photomask for exposure of a semiconductor wafer using dipole illumination and method of manufacturing the same is disclosed. A method of forming a pattern on a semiconductor using the photomask is also disclosed. The photomask may have an array of islands that are used for printing lines using dipole illumination. The photomask may have sub-resolution assist features (SRAF) to assist in printing the lines. The SRAF may include an array of holes.

Abstract translation: 公开了一种用于使用偶极照明曝光半导体晶片的光掩模及其制造方法。 还公开了使用光掩模在半导体上形成图案的方法。 光掩模可以具有用于使用偶极照明打印线的岛阵列。 光掩模可以具有辅助分辨率辅助特征（SRAF）以帮助印刷线。 SRAF可以包括一组孔。

公开(公告)号：US07933475B2

公开(公告)日：2011-04-26

申请号：US12544184

申请日：2009-08-19

Applicant: Chun-Ming Wang ,  Ming-Hau Tung ,  Surya Prakash Ganti

Inventor： Chun-Ming Wang ,  Ming-Hau Tung ,  Surya Prakash Ganti

IPC: G02F1/01 ,  G02B26/00 ,  G03F7/00

CPC classification number: G02B26/001

Abstract: Methods and apparatus for providing lighting in a display are provided. In one embodiment, a microelectromechanical system (MEMS) is provided that includes a transparent substrate and a plurality of interferometric modulators. The interferometric modulators include an optical stack coupled to the transparent substrate, a reflective layer over the optical stack, and one or more posts to support the reflective layer and to provide a path for light from a backlight for lighting the display.

Abstract translation: 提供了用于在显示器中提供照明的方法和装置。 在一个实施例中，提供了包括透明基板和多个干涉式调制器的微机电系统（MEMS）。 干涉式调制器包括耦合到透明衬底的光学叠层，光学叠层上的反射层，以及支撑反射层的一个或多个柱，以及为来自背光源的光提供用于点亮显示器的路径。

公开(公告)号：US20110026327A1

公开(公告)日：2011-02-03

申请号：US12813437

申请日：2010-06-10

Applicant: Chen-Che Huang ,  Chun-Ming Wang ,  Masaaki Higashitani

Inventor： Chen-Che Huang ,  Chun-Ming Wang ,  Masaaki Higashitani

IPC: G11C16/04 ,  H01L21/82

CPC classification number: H01L27/11551 ,  G11C16/0483 ,  H01L23/485 ,  H01L27/11519 ,  H01L27/11556 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Bit line connections for non-volatile storage devices and methods for fabricating the same are disclosed. At least two different types of bit line connections may be used between memory cells and bit lines. The different types of bit line connections may be structurally different from each other as follows. One type of bit line connection may include a metal pad between an upper via and lower via. Another type of bit line connection may include an upper via and lower via, but does not include the metal pad. Three rows of bit line connections may be used to relax the pitch. For example, two rows of bit line connections on the outside may have the metal pad, whereas bit line connections in the middle row do not have the metal pad.

Abstract translation: 公开了用于非易失性存储装置的位线连接及其制造方法。 可以在存储器单元和位线之间使用至少两种不同类型的位线连接。 不同类型的位线连接可以在结构上彼此不同，如下所述。 一种类型的位线连接可以包括在上通孔和下通孔之间的金属垫。 另一种类型的位线连接可以包括上通孔和下通孔，但不包括金属垫。 可以使用三排位线连接来放松间距。 例如，外部的两行位线连接可以具有金属焊盘，而中间行中的位线连接不具有金属焊盘。

公开(公告)号：US07871909B1

公开(公告)日：2011-01-18

申请号：US12689677

申请日：2010-01-19

Applicant: Chun-Ming Wang ,  Chen-Che Huang ,  Masaaki Higashitani ,  George Matamis

Inventor： Chun-Ming Wang ,  Chen-Che Huang ,  Masaaki Higashitani ,  George Matamis

IPC: H01L21/3205 ,  H01L21/44

CPC classification number: H01L21/76838 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/32139 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/11517 ,  Y10S438/947

Abstract: Methods for forming patterns having triple the line frequency of a first pattern using only a single spacer are disclosed. For example, the first pattern is formed in a first and a second material using a lithographic process. Sidewall spacers are formed from a third material adjacent to exposed sidewalls of features in the second material. The width of the features in the first pattern in the first material is reduced. For example, the width is reduced to about the target width of features in a final pattern. The width of features in the first pattern in the second material is reduced using remaining portions of the first material as a mask. A second pattern is formed based on remaining portions of the second material and the sidewall spacers. The features in the second pattern may be lines having about ⅓ the width of lines in the first pattern.

Abstract translation: 公开了仅使用单个间隔物形成具有三倍于第一图案的线频率的图案的方法。 例如，使用光刻工艺在第一和第二材料中形成第一图案。 侧壁间隔件由与第二材料中的特征的暴露的侧壁相邻的第三材料形成。 第一材料中第一图案中的特征的宽度减小。 例如，以最终图案将宽度减小到大约特征的目标宽度。 使用第一材料的剩余部分作为掩模来减少第二材料中的第一图案中的特征的宽度。 基于第二材料和侧壁间隔物的剩余部分形成第二图案。 第二图案中的特征可以是具有第一图案中的线的宽度的大约1/3的线。

公开(公告)号：US20100202039A1

公开(公告)日：2010-08-12

申请号：US12766702

申请日：2010-04-23

Applicant: Lior Kogut ,  Chengbin Qiu ,  Chun-Ming Wang ,  Stephen Zee ,  Fan Zhong

Inventor： Lior Kogut ,  Chengbin Qiu ,  Chun-Ming Wang ,  Stephen Zee ,  Fan Zhong

IPC: G02B26/00 ,  C23F1/02

CPC classification number: G02B26/0841 ,  B81B3/0072 ,  B81B2201/047 ,  B81B2203/0163 ,  B81B2203/019 ,  B81B2203/0307 ,  B81B2203/053 ,  B81C1/00142 ,  B81C1/00666 ,  B81C2201/0167 ,  G02B26/001 ,  Y10S359/90

Abstract: Embodiments of MEMS devices include support structures having substantially vertical sidewalls. Certain support structures are formed through deposition of self-planarizing materials or via a plating process. Other support structures are formed via a spacer etch. Other MEMS devices include support structures at least partially underlying a movable layer, where the portions of the support structures underlying the movable layer include a convex sidewall. In further embodiments, a portion of the support structure extends through an aperture in the movable layer and over at least a portion of the movable layer.

Abstract translation: MEMS器件的实施例包括具有基本垂直侧壁的支撑结构。 通过沉积自平面化材料或通过电镀工艺形成某些支撑结构。 通过间隔物蚀刻形成其它支撑结构。 其它MEMS器件包括至少部分在可移动层下方的支撑结构，其中可移动层下面的支撑结构的部分包括凸形侧壁。 在另外的实施例中，支撑结构的一部分延伸穿过可移动层中的孔并且在可移动层的至少一部分上方延伸。

公开(公告)号：US07660058B2

公开(公告)日：2010-02-09

申请号：US11506770

申请日：2006-08-18

Applicant: Chengbin Qiu ,  Teruo Sasagawa ,  Ming-Hau Tung ,  Chun-Ming Wang ,  Stephen Zee

Inventor： Chengbin Qiu ,  Teruo Sasagawa ,  Ming-Hau Tung ,  Chun-Ming Wang ,  Stephen Zee

IPC: H01L21/302 ,  B44C1/22

CPC classification number: G02B26/0841 ,  B81B3/0072 ,  B81B2201/047 ,  B81B2203/0163 ,  B81B2203/019 ,  B81B2203/0307 ,  B81B2203/053 ,  B81C1/00142 ,  B81C1/00666 ,  B81C2201/0167 ,  G02B26/001 ,  Y10S359/90

Abstract: Certain MEMS devices include layers patterned to have tapered edges. One method for forming layers having tapered edges includes the use of an etch leading layer. Another method for forming layers having tapered edges includes the deposition of a layer in which the upper portion is etchable at a faster rate than the lower portion. Another method for forming layers having tapered edges includes the use of multiple iterative etches. Another method for forming layers having tapered edges includes the use of a liftoff mask layer having an aperture including a negative angle, such that a layer can be deposited over the liftoff mask layer and the mask layer removed, leaving a structure having tapered edges.

Abstract translation: 某些MEMS器件包括被图案化以具有渐缩边缘的层。 用于形成具有渐缩边缘的层的一种方法包括使用蚀刻引导层。 用于形成具有锥形边缘的层的另一种方法包括沉积一层，其中上部可以比下部更快的速度进行刻蚀。 用于形成具有渐缩边缘的层的另一种方法包括使用多个迭代蚀刻。 用于形成具有锥形边缘的层的另一种方法包括使用具有包括负角度的孔的剥离掩模层，使得可以在剥离掩模层上沉积一层，并且去除掩模层，留下具有渐缩边缘的结构。

公开(公告)号：US07603001B2

公开(公告)日：2009-10-13

申请号：US11357702

申请日：2006-02-17

Applicant: Chun-Ming Wang ,  Ming-Hau Tung ,  Surya Prakash Ganti

Inventor： Chun-Ming Wang ,  Ming-Hau Tung ,  Surya Prakash Ganti

IPC: G02F1/01 ,  G02B26/00 ,  G03F7/00

CPC classification number: G02B26/001

Abstract: Methods and apparatus for providing light in an interferometric modulator device are provided. In one embodiment, a microelectromechanical system (MEMS) is provided that includes a transparent substrate and a plurality of interferometric modulators. The interferometric modulators include an optical stack coupled to the transparent substrate, a reflective layer over the optical stack, and one or more posts to support the reflective and to provide a path for light from a backlight for lighting the interferometric modulators.

Abstract translation: 提供了用于在干涉式调制器装置中提供光的方法和装置。 在一个实施例中，提供了包括透明基板和多个干涉式调制器的微机电系统（MEMS）。 干涉式调制器包括耦合到透明衬底的光学叠层，光学叠层上的反射层，以及支撑反射层的一个或多个柱，以及为来自背光源的光提供用于点亮干涉式调制器的路径。

公开(公告)号：US07472469B2

公开(公告)日：2009-01-06

申请号：US11231438

申请日：2005-09-20

Applicant: David Eugene Heim ,  Kim Y. Lee ,  Tsann Lin ,  Jih-Shiuan Luo ,  Chun-Ming Wang

Inventor： David Eugene Heim ,  Kim Y. Lee ,  Tsann Lin ,  Jih-Shiuan Luo ,  Chun-Ming Wang

IPC: G11B5/127 ,  H04R31/00

CPC classification number: G11B5/398 ,  B82Y10/00 ,  B82Y25/00 ,  G11B5/3163 ,  G11B5/3932 ,  H01L43/12 ,  Y10T29/49039 ,  Y10T29/49043 ,  Y10T29/49044 ,  Y10T29/49046 ,  Y10T29/49048 ,  Y10T29/49052

Abstract: A method is disclosed for fabricating a read sensor for a magnetic head for a hard disk drive having a read sensor stack and two lateral stacks. The method of fabrication includes forming lateral stacks on a gap layer, surrounding a groove to form a template. The read sensor stack is then formed in the groove, which defines the lateral dimensions of the read sensor stack, and lead layers are then formed on the lateral stacks. Also disclosed is a read head for a disk drive having a sensor stack defined by pre-established lateral stacks, and a disk drive having the read head.

Abstract translation: 公开了一种用于制造用于具有读取传感器堆叠和两个横向堆叠的硬盘驱动器的磁头的读取传感器的方法。 制造方法包括在间隙层上形成横向叠层，围绕凹槽形成模板。 然后将读取的传感器堆叠形成在凹槽中，其限定读取的传感器堆叠的横向尺寸，然后在横向堆叠件上形成引线层。 还公开了一种用于具有由预先建立的横向叠层定义的传感器堆叠的磁盘驱动器的读取头，以及具有读取磁头的磁盘驱动器。

公开(公告)号：US07183224B2

公开(公告)日：2007-02-27

申请号：US10631579

申请日：2003-07-30

Applicant: Kim Y. Lee ,  Chun-Ming Wang

Inventor： Kim Y. Lee ,  Chun-Ming Wang

IPC: H01L21/302 ,  H01L21/461

CPC classification number: G11B5/3163 ,  H01L21/0272 ,  Y10T29/49021

Abstract: A method is invented for processing a thin-film head/semiconductor wafer. A layer of polymer is applied onto a wafer. A layer of dielectric material is added above the polymer layer. A layer of photoresist is added above the dielectric layer. The photoresist layer is patterned using a photolithography process. Exposed portions of the dielectric layer are removed. Exposed portions of the polymer layer are removed. Exposed portions of the wafer are removed. The polymer layer and any material thereabove is removed after hard bias/leads deposition.

Abstract translation: 发明了一种用于处理薄膜头/半导体晶片的方法。 将一层聚合物施加到晶片上。 在聚合物层之上添加介电材料层。 在介电层上方添加一层光致抗蚀剂。 使用光刻工艺对光致抗蚀剂层进行图案化。 除去介电层的露出部分。 去除聚合物层的暴露部分。 去除晶片的暴露部分。 在硬偏压/引线沉积之后，去除聚合物层和其上的任何材料。