Needle alignment for wearable biosensors

    公开(公告)号:US11234623B2

    公开(公告)日:2022-02-01

    申请号:US15896164

    申请日:2018-02-14

    Applicant: DexCom, Inc.

    Inventor: Sean Frick

    Abstract: Various examples are described for needle alignment for wearable biosensors. One example device includes a housing comprising an upper portion and a lower portion, the housing defining a cavity between the upper portion and the lower portion and configured to be worn on a wearer's skin, wherein: the upper portion defines a first opening extending through the upper portion to the cavity, and the lower portion defines a second opening extending through the lower portion to the cavity, the cavity establishing a substantially unobstructed pathway including the first opening and the second opening to enable an insertion needle to be inserted through the housing; and a needle guide extending into and along a portion of the pathway and aligned with a sensor wire to enable alignment between the insertion needle and the sensor wire.

    NEEDLE ALIGNMENT FOR WEARABLE BIOSENSORS

    公开(公告)号:US20220110559A1

    公开(公告)日:2022-04-14

    申请号:US17559936

    申请日:2021-12-22

    Applicant: DexCom, Inc.

    Inventor: Sean Frick

    Abstract: Various examples are described for needle alignment for wearable biosensors. One example device includes a housing comprising an upper portion and a lower portion, the housing defining a cavity between the upper portion and the lower portion and configured to be worn on a wearer's skin, wherein: the upper portion defines a first opening extending through the upper portion to the cavity, and the lower portion defines a second opening extending through the lower portion to the cavity, the cavity establishing a substantially unobstructed pathway including the first opening and the second opening to enable an insertion needle to be inserted through the housing; and a needle guide extending into and along a portion of the pathway and aligned with a sensor wire to enable alignment between the insertion needle and the sensor wire.

    SENSOR INTERPOSER EMPLOYING CASTELLATED THROUGH-VIAS

    公开(公告)号:US20200245459A1

    公开(公告)日:2020-07-30

    申请号:US16850986

    申请日:2020-04-16

    Applicant: DexCom, Inc.

    Abstract: An example sensor interposer employing castellated through-vias formed in a PCB includes a planar substrate defining a plurality of castellated through-vias; a first electrical contact formed on the planar substrate and electrically coupled to a first castellated through-via; a second electrical contact formed on the planar substrate and electrically coupled to a second castellated through-via, the second castellated through-via electrically isolated from the first castellated through-via; and a guard trace formed on the planar substrate, the guard trace having a first portion formed on a first surface of the planar substrate and electrically coupling a third castellated through-via to a fourth castellated through-via, the guard trace having a second portion formed on a second surface of the planar substrate and electrically coupling the third castellated through-via to the fourth castellated through-via, the guard trace formed between the first and second electrical contacts to provide electrical isolation between the first and second electrical contacts.

    Sensor interposer employing castellated through-vias

    公开(公告)号:US12250768B2

    公开(公告)日:2025-03-11

    申请号:US18381074

    申请日:2023-10-17

    Applicant: DexCom, Inc.

    Abstract: An example sensor interposer employing castellated through-vias formed in a PCB includes a planar substrate defining a plurality of castellated through-vias; a first electrical contact formed on the planar substrate and electrically coupled to a first castellated through-via; a second electrical contact formed on the planar substrate and electrically coupled to a second castellated through-via, the second castellated through-via electrically isolated from the first castellated through-via; and a guard trace formed on the planar substrate, the guard trace having a first portion formed on a first surface of the planar substrate and electrically coupling a third castellated through-via to a fourth castellated through-via, the guard trace having a second portion formed on a second surface of the planar substrate and electrically coupling the third castellated through-via to the fourth castellated through-via, the guard trace formed between the first and second electrical contacts to provide electrical isolation between the first and second electrical contacts.

    SENSOR INTERPOSER EMPLOYING CASTELLATED THROUGH-VIAS

    公开(公告)号:US20240049388A1

    公开(公告)日:2024-02-08

    申请号:US18381074

    申请日:2023-10-17

    Applicant: DexCom, Inc.

    Abstract: An example sensor interposer employing castellated through-vias formed in a PCB includes a planar substrate defining a plurality of castellated through-vias; a first electrical contact formed on the planar substrate and electrically coupled to a first castellated through-via; a second electrical contact formed on the planar substrate and electrically coupled to a second castellated through-via, the second castellated through-via electrically isolated from the first castellated through-via; and a guard trace formed on the planar substrate, the guard trace having a first portion formed on a first surface of the planar substrate and electrically coupling a third castellated through-via to a fourth castellated through-via, the guard trace having a second portion formed on a second surface of the planar substrate and electrically coupling the third castellated through-via to the fourth castellated through-via, the guard trace formed between the first and second electrical contacts to provide electrical isolation between the first and second electrical contacts.

    SENSOR INTERPOSER EMPLOYING CASTELLATED THROUGH-VIAS

    公开(公告)号:US20220095454A1

    公开(公告)日:2022-03-24

    申请号:US17542977

    申请日:2021-12-06

    Applicant: DexCom, Inc.

    Abstract: An example sensor interposer employing castellated through-vias formed in a PCB includes a planar substrate defining a plurality of castellated through-vias; a first electrical contact formed on the planar substrate and electrically coupled to a first castellated through-via; a second electrical contact formed on the planar substrate and electrically coupled to a second castellated through-via, the second castellated through-via electrically isolated from the first castellated through-via; and a guard trace formed on the planar substrate, the guard trace having a first portion formed on a first surface of the planar substrate and electrically coupling a third castellated through-via to a fourth castellated through-via, the guard trace having a second portion formed on a second surface of the planar substrate and electrically coupling the third castellated through-via to the fourth castellated through-via, the guard trace formed between the first and second electrical contacts to provide electrical isolation between the first and second electrical contacts.

    Sensor interposer employing castellated through-vias

    公开(公告)号:US10660201B2

    公开(公告)日:2020-05-19

    申请号:US16282587

    申请日:2019-02-22

    Applicant: DexCom, Inc.

    Abstract: An example sensor interposer employing castellated through-vias formed in a PCB includes a planar substrate defining a plurality of castellated through-vias; a first electrical contact formed on the planar substrate and electrically coupled to a first castellated through-via; a second electrical contact formed on the planar substrate and electrically coupled to a second castellated through-via, the second castellated through-via electrically isolated from the first castellated through-via; and a guard trace formed on the planar substrate, the guard trace having a first portion formed on a first surface of the planar substrate and electrically coupling a third castellated through-via to a fourth castellated through-via, the guard trace having a second portion formed on a second surface of the planar substrate and electrically coupling the third castellated through-via to the fourth castellated through-via, the guard trace formed between the first and second electrical contacts to provide electrical isolation between the first and second electrical contacts.

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