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公开(公告)号:US10158969B2
公开(公告)日:2018-12-18
申请号:US15461715
申请日:2017-03-17
Applicant: Empire Technology Development LLC
Inventor: Harm Cronie , Xudong Ma
Abstract: Systems and methods for concurrent wireless power transfer and data transmission are provided. A constraint encoder receives data bits for communication to a mobile device and encodes the data bits onto a transmit signal. The constraint encoder specifies signal constraints that cause the transmit signal to have a peak-to-power-average ratio (PAPR) during a given time interval sufficient to provide wireless power transfer to the mobile device. The system also includes a signal generator coupled to the constraint encoder. The signal generator generates the transmit signal according to the signal constraints. The system further includes a transmitter coil that is coupled to the signal generator. The transmitter coil is configured to transmit the transmit signal that has been encoded with the data bits to receiver coils of the mobile device. The encoded transmit signal is able to provide wireless power transfer and the encoded data bits to the mobile device.
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公开(公告)号:US09424945B2
公开(公告)日:2016-08-23
申请号:US14541588
申请日:2014-11-14
Applicant: Empire Technology Development LLC
Inventor: Xudong Ma
CPC classification number: G11C16/3431 , G11C7/02 , G11C11/5642 , G11C16/26
Abstract: Technologies are generally described herein for linear programming based decoding for memory devices. In some examples, a cell threshold voltage level of a memory cell is detected. An interference voltage level of an interference cell that interferes with the memory cell can be determined. The cell threshold voltage level can be decoded in accordance with a set of beliefs to determine the value of the memory cell. The set of beliefs can include a minimization of an objective function of a linear program representing inter-cell interference between the memory cell and the interference cell.
Abstract translation: 这里通常描述了用于存储器件的基于线性规划的解码技术。 在一些示例中,检测存储器单元的单元阈值电压电平。 可以确定干扰电池的干扰电压电平,该干扰电池干扰该存储器单元。 可以根据一组信念来解码单元阈值电压电平,以确定存储单元的值。 这组信念可以包括表示存储器单元和干扰小区之间的小区间干扰的线性程序的目标函数的最小化。
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公开(公告)号:US09930114B2
公开(公告)日:2018-03-27
申请号:US14526434
申请日:2014-10-28
Applicant: Empire Technology Development LLC
Inventor: Xudong Ma
IPC: G06F15/167 , H04L29/08 , H04B1/707
CPC classification number: H04L67/1097 , H04B1/707
Abstract: Technologies are generally described for code-division-multiple-access (CDMA)-based network-coding for reading data from massive memory servers. According to some examples, data may be modulated by spreading sequences prior to being transmitted from one memory node to another. In addition, the received signals (modulated data) from multiple memory nodes may be combined by a receiver memory node before being forwarded to other memory nodes arranged in a grid of memory nodes. The memory nodes may be assigned communication bandwidths flexibly and rapidly by changing the respective spreading sequences, which may be orthogonal or near-orthogonal for different memory nodes to allow support of random-access burst or dynamic data traffic, and enhancing fault-tolerance.
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公开(公告)号:US09602955B2
公开(公告)日:2017-03-21
申请号:US14717498
申请日:2015-05-20
Applicant: Empire Technology Development LLC
Inventor: Harm Cronie , Xudong Ma
CPC classification number: H04W4/008 , H04B5/0031 , H04B5/0037 , H04B5/0075 , H04L27/2614 , H04L27/263 , H04L27/2636 , H04W4/80
Abstract: Systems and methods for concurrent wireless power transfer and data transmission are provided. A constraint encoder receives data bits for communication to a mobile device and encodes the data bits onto a transmit signal. The constraint encoder specifies signal constraints that cause the transmit signal to have a peak-to-power-average ratio (PAPR) during a given time interval sufficient to provide wireless power transfer to the mobile device. The system also includes a signal generator coupled to the constraint encoder. The signal generator generates the transmit signal according to the signal constraints. The system further includes a transmitter coil that is coupled to the signal generator. The transmitter coil is configured to transmit the transmit signal that has been encoded with the data bits to receiver coils of the mobile device. The encoded transmit signal is able to provide wireless power transfer and the encoded data bits to the mobile device.
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公开(公告)号:US20150070985A1
公开(公告)日:2015-03-12
申请号:US14541588
申请日:2014-11-14
Applicant: Empire Technology Development LLC
Inventor: Xudong Ma
IPC: G11C16/34
CPC classification number: G11C16/3431 , G11C7/02 , G11C11/5642 , G11C16/26
Abstract: Technologies are generally described herein for linear programming based decoding for memory devices. In some examples, a cell threshold voltage level of a memory cell is detected. An interference voltage level of an interference cell that interferes with the memory cell can be determined. The cell threshold voltage level can be decoded in accordance with a set of beliefs to determine the value of the memory cell. The set of beliefs can include a minimization of an objective function of a linear program representing inter-cell interference between the memory cell and the interference cell.
Abstract translation: 这里通常描述了用于存储器件的基于线性规划的解码技术。 在一些示例中,检测存储器单元的单元阈值电压电平。 可以确定干扰电池的干扰电压电平,该干扰电池干扰该存储器单元。 可以根据一组信念来解码单元阈值电压电平,以确定存储单元的值。 这组信念可以包括表示存储器单元与干扰小区之间的小区间干扰的线性程序的目标函数的最小化。
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公开(公告)号:US20140201426A1
公开(公告)日:2014-07-17
申请号:US13879708
申请日:2013-01-11
Applicant: Empire Technology Development LLC
Inventor: Xudong Ma
IPC: G06F12/02
CPC classification number: G06F12/0246 , G06F2212/7202
Abstract: Technologies are described herein for allocating pages in a flash memory. Some example technologies may receive multiple data elements and a write request to write the multiple data elements to the flash memory. Example technologies may identify a correlation between a subset of the data elements based on correlation criteria. Example technologies may allocate neighboring pages of the flash memory for storing the subset of the data elements. Example technologies may write the subset of the data elements into the allocated pages.
Abstract translation: 这里描述了在闪存中分配页面的技术。 一些示例性技术可以接收多个数据元素和写入请求以将多个数据元素写入闪速存储器。 示例性技术可以基于相关标准来识别数据元素的子集之间的相关性。 示例性技术可以分配用于存储数据元素的子集的闪存的相邻页面。 示例技术可以将数据元素的子集写入分配的页面。
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公开(公告)号:US20170195831A1
公开(公告)日:2017-07-06
申请号:US15461715
申请日:2017-03-17
Applicant: Empire Technology Development LLC
Inventor: Harm Cronie , Xudong Ma
CPC classification number: H04L27/2614 , H04B5/0031 , H04B5/0037 , H04B5/0075 , H04L27/263 , H04L27/2636 , H04W4/80
Abstract: Systems and methods for concurrent wireless power transfer and data transmission are provided. A constraint encoder receives data bits for communication to a mobile device and encodes the data bits onto a transmit signal. The constraint encoder specifies signal constraints that cause the transmit signal to have a peak-to-power-average ratio (PAPR) during a given time interval sufficient to provide wireless power transfer to the mobile device. The system also includes a signal generator coupled to the constraint encoder. The signal generator generates the transmit signal according to the signal constraints. The system further includes a transmitter coil that is coupled to the signal generator. The transmitter coil is configured to transmit the transmit signal that has been encoded with the data bits to receiver coils of the mobile device. The encoded transmit signal is able to provide wireless power transfer and the encoded data bits to the mobile device.
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公开(公告)号:US20140244905A1
公开(公告)日:2014-08-28
申请号:US13997890
申请日:2013-02-27
Applicant: Empire Technology Development LLC
Inventor: Xudong Ma
CPC classification number: G11C16/3431 , G11C7/02 , G11C11/5642 , G11C16/26
Abstract: Technologies are generally described herein for linear programming based decoding for memory devices. In some examples, a cell threshold voltage level of a memory cell is detected. An interference voltage level of an interference cell that interferes with the memory cell can be determined. The cell threshold voltage level can be decoded in accordance with a set of beliefs to determine the value of the memory cell. The set of beliefs can include a minimization of an objective function of a linear program representing inter-cell interference between the memory cell and the interference cell.
Abstract translation: 这里通常描述了用于存储器件的基于线性规划的解码技术。 在一些示例中,检测存储器单元的单元阈值电压电平。 可以确定干扰电池的干扰电压电平,该干扰电池干扰该存储器单元。 可以根据一组信念来解码单元阈值电压电平,以确定存储单元的值。 这组信念可以包括表示存储器单元和干扰小区之间的小区间干扰的线性程序的目标函数的最小化。
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公开(公告)号:US09859925B2
公开(公告)日:2018-01-02
申请号:US14785582
申请日:2013-12-13
Applicant: Empire Technology Development LLC
Inventor: Xudong Ma
CPC classification number: H03M13/3746 , G06F11/1068 , G11C29/52 , H03M13/1111 , H03M13/458
Abstract: Technologies and implementations for encoding and storing data in a solid-state memory device with a reduced number of erasures using a simplified belief-propagation algorithm that includes a set of message-calculation rules that have a low computational complexity are generally disclosed. Additionally, technologies and implementations for decoding data and for error correction are generally disclosed.
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公开(公告)号:US09852000B2
公开(公告)日:2017-12-26
申请号:US14915217
申请日:2013-08-27
Applicant: EMPIRE TECHNOLOGY DEVELOPMENT LLC
Inventor: Xudong Ma
CPC classification number: G06F9/45558 , G06F9/5088 , G06F2009/4557
Abstract: Techniques described herein generally relate to consolidating computation tasks associated with a plurality of virtual machines. In one embodiment, a method may include forming a pipeline having at least a first core and a second core after having detected a formation condition, identifying a first set of operations of a first virtual machine running on a first host device that are similar to a second set of operations of a second virtual machine running on a second host device, identifying a third set of operations of the first virtual machine that are similar to a fourth set of operations of the second virtual machine, dispatching the first set of operations and the second set of operations to the first core of the pipeline for execution, and dispatching the third set of operations and the fourth set of operations to the second core of the pipeline for execution.
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