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    Apparatus and Methods for Integrated Power Converter with High Bandwidth
    3.
    发明申请
    Apparatus and Methods for Integrated Power Converter with High Bandwidth 有权
    具有高带宽的集成电源转换器的装置和方法

    公开(公告)号：US20160036330A1

    公开(公告)日：2016-02-04

    申请号：US14814033

    申请日：2015-07-30

    Applicant: Ferric Inc.

    Inventor： Noah Sturcken ,  David Jew ,  Joe Meyer

    IPC: H02M3/158

    CPC classification number: H02M3/158 ,  H02M3/1584 ,  H02M2001/0045

    Abstract: A DC-DC power converter includes a switched inductor power converter and a parallel linear voltage regulator. Two transistors are positioned in the switched inductor power converter to periodically set a bridge voltage thereby producing a square wave with a fixed frequency and variable duty cycle. An inductor and an output capacitor filter the bridge voltage so that only the average value of the bridge voltage is passed to the load. Parasitic impedance due to physical separation of the switched inductor power converter and the load is overcome by providing the parallel linear regulator with its own dedicated channel to the load.

    Abstract translation: DC-DC电力转换器包括开关电感功率转换器和并联线性电压调节器。 两个晶体管位于开关电感功率转换器中，以周期性地设置桥电压，从而产生具有固定频率和可变占空比的方波。 电感器和输出电容器对桥接电压进行滤波，使桥接电压的平均值仅传递给负载。 由于开关电感功率转换器和负载的物理分离引起的寄生阻抗通过向负载提供其自己的专用通道的并联线性稳压器来克服。

    Zero-voltage switch-mode power converter
    5.
    发明授权
    Zero-voltage switch-mode power converter 有权

    公开(公告)号：US09906131B1

    公开(公告)日：2018-02-27

    申请号：US15243022

    申请日：2016-08-22

    Applicant: Ferric Inc.

    Inventor： William Lee ,  David Jew ,  Joseph Meyer ,  Noah Sturcken

    IPC: H02M3/158 ,  H02M3/157 ,  H02M1/00

    CPC classification number: H02M3/158 ,  H02M1/38 ,  H02M3/157 ,  H02M3/1588 ,  H02M2001/0058 ,  Y02B70/1491

    Abstract: A switched-mode power converter includes timing control feedback loop circuits to minimize or eliminate the potential difference across a high-power switch and a low-power switch during their transitions times. A first feedback circuit compares the measured voltage across the high-power switch at the moment the high-power switch closes with the input voltage to the high-power switch to control a low-to-high delay time. A second feedback circuit compares the measured voltage across the low-power switch at the moment the low-power switch closes with the input voltage to the low-power switch to control a high-to-low delay time. A third feedback circuit compares the measured voltage across the low-power switch at the moment the low-power switch opens. The output of the third feedback circuit is provided as inputs to the first and second feedback circuits. The third feedback circuit also controls the frequency of the power converter.

    Zero-Voltage Switch-Mode Power Converter
    6.
    发明申请
    Zero-Voltage Switch-Mode Power Converter 有权

    公开(公告)号：US20180054118A1

    公开(公告)日：2018-02-22

    申请号：US15243022

    申请日：2016-08-22

    Applicant: Ferric Inc.

    Inventor： William Lee ,  David Jew ,  Joseph Meyer ,  Noah Sturcken

    IPC: H02M3/158 ,  H03M1/66

    CPC classification number: H02M3/158 ,  H02M1/38 ,  H02M3/157 ,  H02M3/1588 ,  H02M2001/0058 ,  Y02B70/1491

    Abstract: A switched-mode power converter includes timing control feedback loop circuits to minimize or eliminate the potential difference across a high-power switch and a low-power switch during their transitions times. A first feedback circuit compares the measured voltage across the high-power switch at the moment the high-power switch closes with the input voltage to the high-power switch to control a low-to-high delay time. A second feedback circuit compares the measured voltage across the low-power switch at the moment the low-power switch closes with the input voltage to the low-power switch to control a high-to-low delay time. A third feedback circuit compares the measured voltage across the low-power switch at the moment the low-power switch opens. The output of the third feedback circuit is provided as inputs to the first and second feedback circuits. The third feedback circuit also controls the frequency of the power converter.

    Apparatus and methods for integrated power converter with high bandwidth
    7.
    发明授权
    Apparatus and methods for integrated power converter with high bandwidth 有权

    公开(公告)号：US09847718B2

    公开(公告)日：2017-12-19

    申请号：US14814033

    申请日：2015-07-30

    Applicant: Ferric Inc.

    Inventor： Noah Sturcken ,  David Jew ,  Joe Meyer

    IPC: H02M3/158 ,  H02M1/00

    CPC classification number: H02M3/158 ,  H02M3/1584 ,  H02M2001/0045

    Abstract: A DC-DC power converter includes a switched inductor power converter and a parallel linear voltage regulator. Two transistors are positioned in the switched inductor power converter to periodically set a bridge voltage thereby producing a square wave with a fixed frequency and variable duty cycle. An inductor and an output capacitor filter the bridge voltage so that only the average value of the bridge voltage is passed to the load. Parasitic impedance due to physical separation of the switched inductor power converter and the load is overcome by providing the parallel linear regulator with its own dedicated channel to the load.

    Zero-voltage switch-mode power converter
    8.
    发明授权
    Zero-voltage switch-mode power converter 有权

    公开(公告)号：US10326366B2

    公开(公告)日：2019-06-18

    申请号：US15869726

    申请日：2018-01-12

    Applicant: Ferric Inc.

    Inventor： William Lee ,  David Jew ,  Joseph Meyer ,  Noah Sturcken

    IPC: H02M3/158 ,  H02M3/157 ,  H02M1/38 ,  H02M1/00

    Abstract: A switched-mode power converter includes timing control feedback loop circuits to minimize or eliminate the potential difference across a high-power switch and a low-power switch during their transitions times. A first feedback circuit compares the measured voltage across the high-power switch at the moment the high-power switch closes with the input voltage to the high-power switch to control a low-to-high delay time. A second feedback circuit compares the measured voltage across the low-power switch at the moment the low-power switch closes with the input voltage to the low-power switch to control a high-to-low delay time. A third feedback circuit compares the measured voltage across the low-power switch at the moment the low-power switch opens. The output of the third feedback circuit is provided as inputs to the first and second feedback circuits. The third feedback circuit also controls the frequency of the power converter.

    Zero-Voltage Switch-Mode Power Converter
    10.
    发明申请
    Zero-Voltage Switch-Mode Power Converter 审中-公开

    公开(公告)号：US20180145592A1

    公开(公告)日：2018-05-24

    申请号：US15869726

    申请日：2018-01-12

    Applicant: Ferric Inc.

    Inventor： William Lee ,  David Jew ,  Joseph Meyer ,  Noah Sturcken

    IPC: H02M3/158 ,  H02M3/157 ,  H02M1/00

    CPC classification number: H02M3/158 ,  H02M1/38 ,  H02M3/157 ,  H02M3/1588 ,  H02M2001/0058 ,  Y02B70/1466 ,  Y02B70/1491

    Abstract: A switched-mode power converter includes timing control feedback loop circuits to minimize or eliminate the potential difference across a high-power switch and a low-power switch during their transitions times. A first feedback circuit compares the measured voltage across the high-power switch at the moment the high-power switch closes with the input voltage to the high-power switch to control a low-to-high delay time. A second feedback circuit compares the measured voltage across the low-power switch at the moment the low-power switch closes with the input voltage to the low-power switch to control a high-to-low delay time. A third feedback circuit compares the measured voltage across the low-power switch at the moment the low-power switch opens. The output of the third feedback circuit is provided as inputs to the first and second feedback circuits. The third feedback circuit also controls the frequency of the power converter.

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