APPARATUS, SYSTEM, AND METHOD FOR RECONFIGURING AN ARRAY OF STORAGE ELEMENTS
    3.
    发明申请
    APPARATUS, SYSTEM, AND METHOD FOR RECONFIGURING AN ARRAY OF STORAGE ELEMENTS 有权
    用于重新构建存储元件阵列的装置,系统和方法

    公开(公告)号:US20140258775A1

    公开(公告)日:2014-09-11

    申请号:US14286712

    申请日:2014-05-23

    Abstract: Apparatuses, systems, and methods are disclosed for reconfiguring an array of storage elements. A storage element error module is configured to determine that one or more storage elements in an array of storage elements are in error. An array of storage elements stores a first ECC block and first parity data generated from the first ECC block. A data reconfiguration module is configured to generate a second ECC block comprising at least a portion of data of a first ECC block. A new configuration storage module is configured to store a second ECC block and associated second parity data on fewer storage elements than a number of storage elements in an array.

    Abstract translation: 公开了用于重新配置存储元件阵列的装置,系统和方法。 存储元件错误模块被配置为确定存储元件阵列中的一个或多个存储元件是错误的。 一组存储元件存储从第一ECC块生成的第一ECC块和第一奇偶校验数据。 数据重配置模块被配置为生成包括第一ECC块的数据的至少一部分的第二ECC块。 新的配置存储模块被配置为在比阵列中的多个存储元件更少的存储元件上存储第二ECC块和相关联的第二奇偶校验数据。

    Systems and methods for adaptive data storage
    7.
    发明授权
    Systems and methods for adaptive data storage 有权
    自适应数据存储的系统和方法

    公开(公告)号:US09495241B2

    公开(公告)日:2016-11-15

    申请号:US13784705

    申请日:2013-03-04

    Abstract: A storage module is configured to store data segments, such as error-correcting code (ECC) codewords, within an array comprising two or more solid-state storage elements. The data segments may be arranged in a horizontal arrangement, a vertical arrangement, a hybrid channel arrangement, and/or vertical stripe arrangement within the array. The data arrangement may determine input/output performance characteristics. An optimal adaptive data storage configuration may be based on read and/or write patterns of storage clients, read time, stream time, and so on. Data of failed storage elements may be reconstructed by use of parity data and/or other ECC codewords stored within the array.

    Abstract translation: 存储模块被配置为在包括两个或多个固态存储元件的阵列内存储诸如纠错码(ECC)码字的数据段。 数据段可以布置在阵列内的水平布置,垂直布置,混合信道布置和/或垂直条带布置中。 数据排列可以确定输入/输出性能特征。 最佳自适应数据存储配置可以基于存储客户端的读取和/或写入模式,读取时间,流时间等。 可以通过使用存储在该阵列内的奇偶校验数据和/或其他ECC码字来重构失败存储元件的数据。

    Program suspend/resume for memory
    8.
    发明授权
    Program suspend/resume for memory 有权
    程式暂停/恢复记忆

    公开(公告)号:US09021158B2

    公开(公告)日:2015-04-28

    申请号:US13834955

    申请日:2013-03-15

    Abstract: A memory device includes a memory array with a plurality of memory elements. Each memory element is configured to store data. The device includes an input/output (I/O) buffer coupled to the memory array. The I/O buffer is configured to receive data from an I/O interface of a memory device controller and write the data to the memory array. The device includes a memory control manager coupled to the memory array. The memory control manager is configured to pause a program operation to the memory array in response to receiving a pause command. The memory control manager is also configured to resume the program operation in response to receiving a resume command.

    Abstract translation: 存储器件包括具有多个存储器元件的存储器阵列。 每个存储器元件被配置为存储数据。 该设备包括耦合到存储器阵列的输入/输出(I / O)缓冲器。 I / O缓冲器配置为从存储器件控制器的I / O接口接收数据,并将数据写入存储器阵列。 该设备包括耦合到存储器阵列的存储器控​​制管理器。 存储器控制管理器被配置为响应于接收到暂停命令而将程序操作暂停到存储器阵列。 存储器控制管理器还被配置为响应于接收到恢复命令而恢复程序操作。

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