公开(公告)号：US09601187B1

公开(公告)日：2017-03-21

申请号：US15046983

申请日：2016-02-18

Applicant: GLOBALFOUNDRIES INC.

Inventor： Akhilesh Gautam ,  Randy W. Mann ,  William McMahon ,  Yoann Mamy Randriamihaja ,  Yuncheng Song

IPC: G11C11/00 ,  G11C11/419 ,  G11C7/06

CPC classification number: G11C29/56 ,  G11C7/04 ,  G11C8/08 ,  G11C11/418

Abstract: We disclose methods, apparatus, and systems for improving semiconductor device yield and/or reliability through bias temperature instability (BTI). One device may comprise a plurality of cells of an array, wherein each of the cells comprises a pass gate and a latch; a plurality of word lines, wherein each word line controls access to each pass gate of a first number of cells; a word line driver electrically connected to each word line; and a control line configured to provide an operational write voltage or a first write voltage to each word line through the word line driver. By virtue of BTI, application of the first write voltage may lead to improved stability of data desired to be read from one or more cells of the device.

公开(公告)号：US20170271032A1

公开(公告)日：2017-09-21

申请号：US15615660

申请日：2017-06-06

Applicant: GLOBALFOUNDRIES INC.

Inventor： Akhilesh Gautam ,  Randy W. Mann ,  William McMahon ,  Yoann Mamy Randriamihaja ,  Yuncheng Song

IPC: G11C29/52 ,  G11C11/412 ,  G11C11/419

CPC classification number: G11C29/52 ,  G11C7/04 ,  G11C11/412 ,  G11C11/419

Abstract: We disclose methods, apparatus, and systems for improving semiconductor device writeability through bias temperature instability. Such a device may comprise a plurality of cells of an array, wherein each of the cells comprises a pass gate and a latch; a plurality of word lines, wherein each word line comprises a supply voltage line (VCS) which supplies voltage to each latch of a first number of cells; an array VCS driver electrically connected to each VCS; and a control line configured to provide an operational array supply voltage, a first array supply voltage, or a second array supply voltage to each VCS through the array VCS driver.

公开(公告)号：US09916212B2

公开(公告)日：2018-03-13

申请号：US15047395

申请日：2016-02-18

Applicant: GLOBALFOUNDRIES INC.

Inventor： Akhilesh Gautam ,  Randy W. Mann ,  William McMahon ,  Yoann Mamy Randriamihaja ,  Yuncheng Song

IPC: G06F11/00 ,  G06F11/16 ,  G06F11/20

CPC classification number: G06F11/167 ,  G06F11/2015 ,  G06F2201/85 ,  G11C7/04 ,  G11C11/419 ,  G11C29/00 ,  G11C29/028 ,  G11C29/52

Abstract: Method, apparatus, and system for improving semiconductor device writeability at row/bit level through bias temperature instability. Such a device may comprise a plurality of cells of an array, wherein each of the cells comprises a pass gate and a latch; a plurality of word lines, wherein each word line comprises a supply voltage line (VCS) which supplies voltage to each latch of a first number of cells; an array VCS driver electrically connected to each VCS; and a control line configured to provide an operational array supply voltage, a first array supply voltage, or a second array supply voltage to each VCS, wherein the first array supply voltage and the second array supply voltage are greater than the operational array supply voltage. By virtue of BTI, application of the first array supply voltage may lead to improved writeability of one or more cells of the device.

公开(公告)号：US09601188B1

公开(公告)日：2017-03-21

申请号：US15047139

申请日：2016-02-18

Applicant: GLOBALFOUNDRIES INC.

Inventor： Akhilesh Gautam ,  Randy W. Mann ,  William McMahon ,  Yoann Mamy Randriamihaja ,  Yuncheng Song

IPC: G11C11/00 ,  G11C11/419

CPC classification number: G11C29/70 ,  G11C7/04 ,  G11C8/08 ,  G11C11/418 ,  G11C29/56

Abstract: We disclose methods, apparatus, and systems for improving semiconductor device yield and/or reliability through bias temperature instability (BTI). One device may comprise a plurality of cells of an array, wherein each of the cells comprises a pass gate and a latch; a plurality of word lines, wherein each word line controls access to each pass gate of a first number of cells; a word line driver electrically connected to each word line; a row decoder configured to authorize or deauthorize a write voltage to each word line through the word line driver, wherein the write voltage is selected from an operational write voltage or a first write voltage; and a control line configured to provide an operational write voltage or a first write voltage to each word line authorized by the row decoder, wherein the first write voltage is greater than an operational write voltage.

公开(公告)号：US10475677B2

公开(公告)日：2019-11-12

申请号：US15682704

申请日：2017-08-22

Applicant: GLOBALFOUNDRIES INC.

Inventor： Tian Shen ,  Anil Kumar ,  Yuncheng Song ,  Kong Boon Yeap ,  Ronald G. Filippi, Jr. ,  Linjun Cao ,  Seungman Choi ,  Cathryn J. Christiansen ,  Patrick R. Justison

IPC: H01L21/67 ,  G01R3/00 ,  G01R31/12 ,  H01L21/66 ,  G01R31/28

Abstract: An exemplary apparatus includes a testing module connected to, and providing a test voltage to, an integrated circuit containing devices under test. The testing module performs a time-dependent dielectric breakdown (TDDB) test on the devices under test. A decoder is connected to the devices under test and the testing module. The decoder selectively connects each device being tested to the testing module. Efuses are connected to a different one of the devices under test. The efuses separately electrically disconnect each of the devices under test from the test voltage upon failure of a corresponding device under test. Protection circuits are connected between the efuses and a ground voltage. Each protection circuit provides a shunt around the decoder upon failure of the device under test.

公开(公告)号：US10068660B2

公开(公告)日：2018-09-04

申请号：US15615660

申请日：2017-06-06

Applicant: GLOBALFOUNDRIES INC.

Inventor： Akhilesh Gautam ,  Randy W. Mann ,  William McMahon ,  Yoann Mamy Randriamihaja ,  Yuncheng Song

IPC: G11C29/00 ,  G11C29/52 ,  G11C11/419 ,  G11C11/412

Abstract: We disclose methods, apparatus, and systems for improving semiconductor device writeability through bias temperature instability. Such a device may comprise a plurality of cells of an array, wherein each of the cells comprises a pass gate and a latch; a plurality of word lines, wherein each word line comprises a supply voltage line (VCS) which supplies voltage to each latch of a first number of cells; an array VCS driver electrically connected to each VCS; and a control line configured to provide an operational array supply voltage, a first array supply voltage, or a second array supply voltage to each VCS through the array VCS driver.

公开(公告)号：US20190067056A1

公开(公告)日：2019-02-28

申请号：US15682704

申请日：2017-08-22

Applicant: GLOBALFOUNDRIES INC.

Inventor： Tian Shen ,  Anil Kumar ,  Yuncheng Song ,  Kong Boon Yeap ,  Ronald G. Filippi, JR. ,  Linjun Cao ,  Seungman Choi ,  Cathryn J. Christiansen ,  Patrick R. Justison

IPC: H01L21/67 ,  G01R3/00 ,  G01R31/12 ,  H01L21/66

Abstract: An exemplary apparatus includes a testing module connected to, and providing a test voltage to, an integrated circuit containing devices under test. The testing module performs a time-dependent dielectric breakdown (TDDB) test on the devices under test. A decoder is connected to the devices under test and the testing module. The decoder selectively connects each device being tested to the testing module. Efuses are connected to a different one of the devices under test. The efuses separately electrically disconnect each of the devices under test from the test voltage upon failure of a corresponding device under test. Protection circuits are connected between the efuses and a ground voltage. Each protection circuit provides a shunt around the decoder upon failure of the device under test.

公开(公告)号：US20170242759A1

公开(公告)日：2017-08-24

申请号：US15047395

申请日：2016-02-18

Applicant: GLOBALFOUNDRIES INC.

Inventor： Akhilesh Gautam ,  Randy W. Mann ,  William McMahon ,  Yoann Mamy Randriamihaja ,  Yuncheng Song

IPC: G06F11/16 ,  G06F11/20

CPC classification number: G06F11/167 ,  G06F11/2015 ,  G06F2201/85 ,  G11C7/04 ,  G11C11/419 ,  G11C29/00 ,  G11C29/028 ,  G11C29/52

Abstract: Method, apparatus, and system for improving semiconductor device writeability at row/bit level through bias temperature instability. Such a device may comprise a plurality of cells of an array, wherein each of the cells comprises a pass gate and a latch; a plurality of word lines, wherein each word line comprises a supply voltage line (VCS) which supplies voltage to each latch of a first number of cells; an array VCS driver electrically connected to each VCS; and a control line configured to provide an operational array supply voltage, a first array supply voltage, or a second array supply voltage to each VCS, wherein the first array supply voltage and the second array supply voltage are greater than the operational array supply voltage. By virtue of BTI, application of the first array supply voltage may lead to improved writeability of one or more cells of the device.

公开(公告)号：US09704600B1

公开(公告)日：2017-07-11

申请号：US15047271

申请日：2016-02-18

Applicant: GLOBALFOUNDRIES INC.

Inventor： Akhilesh Gautam ,  Randy W. Mann ,  William McMahon ,  Yoann Mamy Randriamihaja ,  Yuncheng Song

IPC: G11C11/00 ,  G11C29/52 ,  G11C11/412 ,  G11C11/419

CPC classification number: G11C29/52 ,  G11C7/04 ,  G11C11/412 ,  G11C11/419

Abstract: We disclose methods, apparatus, and systems for improving semiconductor device writeability through bias temperature instability. Such a device may comprise a plurality of cells of an array, wherein each of the cells comprises a pass gate and a latch; a plurality of word lines, wherein each word line comprises a supply voltage line (VCS) which supplies voltage to each latch of a first number of cells; an array VCS driver electrically connected to each VCS; and a control line configured to provide an operational array supply voltage, a first array supply voltage, or a second array supply voltage to each VCS through the array VCS driver.