公开(公告)号：US10657003B2

公开(公告)日：2020-05-19

申请号：US15565213

申请日：2015-04-10

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Lidia Warnes ,  Patrick M. Schoeller

IPC: G06F11/00 ,  G06F11/14 ,  G06F11/16 ,  G06F11/20 ,  G06F9/4401

Abstract: In one example in accordance with the present disclosure, a system for partial backup during runtime includes a memory module having a volatile memory and a non-volatile memory. The system also includes a backup controller. The backup controller determines that a backup should occur in the memory module. The backup controller determines a backup domain of the volatile memory. The backup controller causes a deactivation domain of the volatile memory to be deactivated, where the deactivation domain includes the backup domain. The backup controller causes the backup to initiate during normal runtime of the system. The backup includes data in the backup domain of the volatile memory being saved to the non-volatile memory.

公开(公告)号：US10592364B2

公开(公告)日：2020-03-17

申请号：US15578557

申请日：2015-06-19

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Lidia Warnes ,  Patrick M. Schoeller

IPC: G06F11/00 ,  G06F11/20 ,  G06F11/14 ,  G06F11/07

Abstract: Examples provide systems and a method for handling errors during run-time back up of volatile memory. The method includes initiating a backup of a volatile memory domain to a non-volatile memory domain. Memory registers are polled for completion of the backup. It is determined if the backup was successful. If not successful, an operating system (OS) is notified that the backup failed, and the backup is completed to an alternate media.

公开(公告)号：US10176043B2

公开(公告)日：2019-01-08

申请号：US15314902

申请日：2014-07-01

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Gregg B. Lesartre ,  Chris Michael Brueggen ,  Lidia Warnes

IPC: G06F11/10 ,  G06F11/07 ,  G06F3/06 ,  G06F11/20

Abstract: Example implementations relate to a memory controller. For example, an apparatus includes a data storage device and a memory controller coupled to the data storage device. The memory controller is to perform, during a memory scrubbing operation, a corrective action to correct an error associated with a data block stored in the data storage device. The memory control is to determine, during the memory scrubbing operation, whether the corrective action is successful. In response to a determination that the corrective action is a failed corrective action, the memory controller is to fix a hardware failure of the data storage device based on a type of the hardware failure.

公开(公告)号：US20170351455A1

公开(公告)日：2017-12-07

申请号：US15535828

申请日：2014-12-22

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Melvin K. Benedict ,  Lidia Warnes

IPC: G06F3/06 ,  G06F11/14

CPC classification number: G06F3/0619 ,  G06F1/30 ,  G06F11/1441 ,  G06F11/1469 ,  G06F11/3058 ,  G06F2201/84 ,  G06F2201/86

Abstract: Example implementations relate to generating statuses for data images. In example implementations, an event, in response to which a save operation is initiated on a memory module, may be identified. A data image may be generated during the save operation. A status may be generated for the generated data mage. The status may include an event portion indicative of the identified event, and a completion portion indicative of whether the save operation was completed.

公开(公告)号：US20170200511A1

公开(公告)日：2017-07-13

申请号：US15313751

申请日：2014-06-26

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Lidia Warnes ,  Melvin K. Benedict ,  Andrew C. Walton

IPC: G11C29/00 ,  G11C5/14 ,  G11C14/00

CPC classification number: G11C29/70 ,  G11C5/04 ,  G11C5/148 ,  G11C14/0018 ,  G11C29/44 ,  G11C29/808 ,  G11C29/835 ,  G11C2029/0409 ,  G11C2029/4402

Abstract: Example implementations relate to post package repair (PPR) data in non-volatile memory. In example implementations, PPR data may be stored in non-volatile memory on a memory module. PPR data may indicate how many PPRs have been performed on the memory module.

公开(公告)号：US10699796B2

公开(公告)日：2020-06-30

申请号：US15310629

申请日：2014-05-27

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Melvin K. Benedict ,  Eric L. Pope ,  Lidia Warnes

IPC: G11C29/38 ,  G11C29/24

Abstract: Examples herein disclose selecting a row of data among multiple rows of data for validation of a repair to the selected row of data. The examples here disclose validating the repair to the selected row of data.

公开(公告)号：US10068661B2

公开(公告)日：2018-09-04

申请号：US15913916

申请日：2018-03-06

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Lidia Warnes ,  Melvin K Benedict ,  Andrew C Walton

IPC: G11C29/00 ,  G11C14/00 ,  G11C5/14

CPC classification number: G11C29/70 ,  G11C5/04 ,  G11C5/148 ,  G11C11/005 ,  G11C14/0018 ,  G11C29/44 ,  G11C29/808 ,  G11C29/835 ,  G11C2029/0409 ,  G11C2029/4402

Abstract: Example implementations relate to post package repair (PPR) data in non-volatile memory. In example implementations, PPR data may be stored in non-volatile memory on a memory module. PPR data may indicate how many PPRs have been performed on the memory module.

公开(公告)号：US20180157565A1

公开(公告)日：2018-06-07

申请号：US15578557

申请日：2015-06-19

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Lidia Warnes ,  Patrick M. Schoeller

IPC: G06F11/20 ,  G06F11/14

CPC classification number: G06F11/2094 ,  G06F11/0766 ,  G06F11/1441 ,  G06F11/1456 ,  G06F11/1458 ,  G06F11/2015 ,  G06F2201/805 ,  G06F2201/82

Abstract: Examples provide systems and a method for handling errors during run-time back up of volatile memory. The method includes initiating a backup of a volatile memory domain to a non-volatile memory domain. Memory registers are polled for completion of the backup. It is determined if the backup was successful. If not successful, an operating system (OS) is notified that the backup failed, and the backup is completed to an alternate media.

公开(公告)号：US20180074907A1

公开(公告)日：2018-03-15

申请号：US15565213

申请日：2015-04-10

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Lidia Warnes ,  Patrick M. Schoeller

IPC: G06F11/14 ,  G06F11/16 ,  G06F9/44 ,  G06F11/20

CPC classification number: G06F11/1441 ,  G06F9/4401 ,  G06F11/1666 ,  G06F11/2015

Abstract: In one example in accordance with the present disclosure, a system for partial backup during runtime includes a memory module having a volatile memory and a non-volatile memory. The system also includes a backup controller. The backup controller determines that a backup should occur in the memory module. The backup controller determines a backup domain of the volatile memory. The backup controller causes a deactivation domain of the volatile memory to be deactivated, where the deactivation domain includes the backup domain. The backup controller causes the backup to initiate during normal runtime of the system. The backup includes data in the backup domain of the volatile memory being saved to the non-volatile memory.

公开(公告)号：US20170192843A1

公开(公告)日：2017-07-06

申请号：US15314831

申请日：2014-08-08

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Lidia Warnes ,  Melvin K. Benedict ,  Andrew C. Walton

IPC: G06F11/10 ,  G06F11/07 ,  G11C29/50 ,  G11C29/44 ,  G06F5/06

CPC classification number: G06F11/1044 ,  G06F5/065 ,  G06F11/076 ,  G11C11/41 ,  G11C29/06 ,  G11C29/12005 ,  G11C29/44 ,  G11C29/50 ,  G11C29/50004 ,  G11C2029/5004

Abstract: Example implementations relate to tracking memory unit errors on a memory device. In example implementations. a memory device may include on-die error-correcting code (ECC) and a plurality of error counters. One of the plurality of error counters may count errors, detected by the on-die ECC, in a memory unit on the memory device. A post package repair (PPR) may be initiated on the memory device in response to a determination that a value of the one of the plurality of error counters equals a threshold value.