公开(公告)号：US07847847B2

公开(公告)日：2010-12-07

申请号：US11044922

申请日：2005-01-27

Applicant: Dun-Nian Yaung ,  Kuo-Ching Huang ,  Ho-Ching Chien ,  Shou-Gwo Wuu

Inventor： Dun-Nian Yaung ,  Kuo-Ching Huang ,  Ho-Ching Chien ,  Shou-Gwo Wuu

IPC: H04N3/14 ,  H04N5/335

CPC classification number: H04N5/361 ,  H01L27/14603 ,  H01L27/14609 ,  H01L27/14643 ,  H01L27/14689 ,  H04N5/3559 ,  H04N5/374 ,  H04N5/37452

Abstract: A CMOS image sensor having increased capacitance that allows a photo-diode to generate a larger current is provided. The increased capacitance reduces noise and the dark signal. The image sensor utilizes a transistor having nitride spacers formed on a buffer oxide layer. Additional capacitance may be provided by various capacitor structures, such as a stacked capacitor, a planar capacitor, a trench capacitor, a MOS capacitor, a MIM/PIP capacitor, or the like. Embodiments of the present invention may be utilized in a 4-transistor pixel or a 3-transistor pixel configuration.

Abstract translation: 提供了具有允许光电二极管产生较大电流的增加的电容的CMOS图像传感器。 增加的电容可以降低噪声和暗信号。 图像传感器利用形成在缓冲氧化物层上的具有氮化物间隔物的晶体管。 附加电容可以由诸如叠层电容器，平面电容器，沟槽电容器，MOS电容器，MIM / PIP电容器等的各种电容器结构来提供。 本发明的实施例可以用于4-晶体管像素或3-晶体管像素配置。

公开(公告)号：US20070120160A1

公开(公告)日：2007-05-31

申请号：US11627883

申请日：2007-01-26

Applicant: Tzu-Hsuan Hsu ,  Dun-Nian Yaung ,  Shou-Gwo Wuu ,  Ho-Ching Chien ,  Chien-Hsien Tseng ,  Jeng-Shyan Lin

Inventor： Tzu-Hsuan Hsu ,  Dun-Nian Yaung ,  Shou-Gwo Wuu ,  Ho-Ching Chien ,  Chien-Hsien Tseng ,  Jeng-Shyan Lin

IPC: H01L31/113

CPC classification number: H01L27/14689 ,  H01L27/1463

Abstract: Provided are a semiconductor device and a method for its manufacture. In one example, the method includes forming an isolation structure having a first refraction index over a sensor embedded in a substrate. A first layer having a second refraction index that is different from the first refraction index is formed over the isolation structure. The first layer is removed from at least a portion of the isolation structure. A second layer having a third refraction index is formed over the isolation structure after the first layer is removed. The third refraction index is substantially similar to the first refraction index.

Abstract translation: 提供半导体器件及其制造方法。 在一个示例中，该方法包括在嵌入基板中的传感器上形成具有第一折射率的隔离结构。 在隔离结构上形成具有与第一折射率不同的第二折射率的第一层。 从隔离结构的至少一部分去除第一层。 在去除第一层之后，在隔离结构上形成具有第三折射率的第二层。 第三折射率基本上类似于第一折射率。

公开(公告)号：US20060148119A1

公开(公告)日：2006-07-06

申请号：US11360750

申请日：2006-02-23

Applicant: Dun-Nian Yaung ,  Shou-Gwo Wuu ,  Ho-Ching Chien ,  Chien-Hsien Tseng ,  Jeng-Shyan Lin

Inventor： Dun-Nian Yaung ,  Shou-Gwo Wuu ,  Ho-Ching Chien ,  Chien-Hsien Tseng ,  Jeng-Shyan Lin

IPC: H01L21/00

CPC classification number: H01L31/103 ,  H01L27/1463 ,  H01L27/14632 ,  H01L27/14643 ,  H01L31/02161

Abstract: The present invention is CMOS image sensor and its method of fabrication. This invention provides an efficient structure to improve the quantum efficiency of a CMOS type photodiode with borderless contact. The image sensor comprises a N-well/P-substrate type photodiode with borderless contact and dielectric structure covering the photodiode region. The dielectric structure is located between the photodiode and the interlevel dielectric (ILD) and is used as a buffer layer for the borderless contact. The method of fabricating a high performance photodiode comprises forming a photodiode in the n-well region of a shallow trench, and embedding a dielectric material between the ILD oxide and the photodiode having a refraction index higher than the ILD oxide.

Abstract translation: 本发明是CMOS图像传感器及其制造方法。 本发明提供了一种提高具有无边界接触的CMOS型光电二极管的量子效率的有效结构。 图像传感器包括覆盖光电二极管区域的无接触接触和介电结构的N阱/ P基板型光电二极管。 电介质结构位于光电二极管和层间电介质（ILD）之间，用作无边界接触的缓冲层。 制造高性能光电二极管的方法包括在浅沟槽的n阱区域中形成光电二极管，并且在ILD氧化物和具有高于ILD氧化物的折射率的光电二极管之间嵌入电介质材料。

公开(公告)号：US20050179063A1

公开(公告)日：2005-08-18

申请号：US10780790

申请日：2004-02-18

Applicant: Dun-Nian Yaung ,  Sou-Kuo Wu ,  Ho-Ching Chien

Inventor： Dun-Nian Yaung ,  Sou-Kuo Wu ,  Ho-Ching Chien

IPC: H01L27/146 ,  H01L29/745 ,  H01L33/00 ,  H04N5/335

CPC classification number: H01L27/14636 ,  H01L27/14643

Abstract: An image sensor with a vertically integrated thin-film photodiode includes a bottom doped layer of a PIN photodiode imbedded in a dielectric layer, wherein a bottom surface of the bottom doped layer completely contacts its corresponding underlying pixel electrode. The bottom doped layers of the PIN photodiodes are formed by a self-aligned and damascene method, therefore the pixel electrodes are not exposed to the I-type amorphous silicon layer of the PIN photodiodes. Moreover, the transparent electrode connects the PIN photodiodes to an external ground voltage power through a ground pad which is a portion of a top metal layer.

Abstract translation: 具有垂直集成的薄膜光电二极管的图像传感器包括嵌入在电介质层中的PIN光电二极管的底部掺杂层，其中底部掺杂层的底表面完全接触其相应的底层像素电极。 PIN光电二极管的底部掺杂层通过自对准和镶嵌方法形成，因此像素电极不暴露于PIN光电二极管的I型非晶硅层。 此外，透明电极通过作为顶部金属层的一部分的接地焊盘将PIN光电二极管连接到外部接地电压电力。

公开(公告)号：US20060092301A1

公开(公告)日：2006-05-04

申请号：US10980639

申请日：2004-11-03

Applicant: Dun-Nian Yaung ,  Ho-Ching Chien ,  Tzu-Hsuan Hsu

Inventor： Dun-Nian Yaung ,  Ho-Ching Chien ,  Tzu-Hsuan Hsu

IPC: H04N5/335

CPC classification number: H04N5/35509

Abstract: An image sensor cell includes a first MOS transistor coupled to an operating voltage for providing an output voltage of the image sensor cell with the output voltage changing conformingly with a voltage on a gate of the first MOS transistor. A photodiode is coupled to a floating node which further controls the voltage of the gate of the first MOS transistor. A photoconductor is coupled between the operating voltage and the floating node. The photoconductor has its resistance varying in response to a magnitude change of an imposed illumination so that the floating node is provided with additional electrical charges conformingly through the photoconductor while the photodiode drains electrical charges, thereby decreasing a voltage reduction rate of the voltage on the gate of the first MOS transistor.

Abstract translation: 图像传感器单元包括耦合到工作电压的第一MOS晶体管，用于提供图像传感器单元的输出电压，输出电压与第一MOS晶体管的栅极上的电压一致地改变。 光电二极管耦合到浮动节点，其进一步控制第一MOS晶体管的栅极的电压。 光电导体耦合在工作电压和浮动节点之间。 光电导体的电阻响应于施加的照明的幅度变化而变化，使得浮动节点在光电二极管耗尽电荷的同时，通过光电导体顺序地被提供额外的电荷，从而降低栅极上的电压的电压降低率 的第一MOS晶体管。

公开(公告)号：US20060073629A1

公开(公告)日：2006-04-06

申请号：US11285671

申请日：2005-11-22

Applicant: Dun-Nian Yaung ,  Shou-Gwo Wuu ,  Ho-Ching Chien ,  Chein-Hsien Tseng

Inventor： Dun-Nian Yaung ,  Shou-Gwo Wuu ,  Ho-Ching Chien ,  Chein-Hsien Tseng

IPC: H01L21/00

CPC classification number: H01L27/14625 ,  H01L27/14685

Abstract: A new method to form an image sensor device is achieved. The method comprises forming an image sensing array in a substrate comprising a plurality of light detecting diodes with spaces between the diodes. A first dielectric layer is formed overlying the diodes but not the spaces. The first dielectric layer has a first refractive index. A second dielectric layer is formed overlying the spaces but not the diodes. The second dielectric layer has a second refractive index that is larger than the first refractive index. A new image sensor device is disclosed.

Abstract translation: 实现了形成图像传感器装置的新方法。 该方法包括在包括在二极管之间具有空间的多个光检测二极管的衬底中形成图像感测阵列。 第一介电层形成在二极管上，但不形成空间。 第一电介质层具有第一折射率。 第二电介质层形成在空间上而不是二极管上。 第二电介质层具有大于第一折射率的第二折射率。 公开了一种新的图像传感器装置。

公开(公告)号：US20060054939A1

公开(公告)日：2006-03-16

申请号：US10980959

申请日：2004-11-04

Applicant: Tzu-Hsuan Hsu ,  Dun-Nian Yaung ,  Wen-De Wang ,  Ho-Ching Chien ,  Shou-Gwo Wuu

Inventor： Tzu-Hsuan Hsu ,  Dun-Nian Yaung ,  Wen-De Wang ,  Ho-Ching Chien ,  Shou-Gwo Wuu

IPC: H01L27/148

CPC classification number: H01L27/14643 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14636

Abstract: A complementary metal oxide semiconductor field effect transistor (CMOS-FET) image sensor. An active photosensing pixel is formed on a substrate. At least one side of the pixel has a width equal to or less than approximately 3 μm. At least one dielectric layer is disposed on the substrate covering the pixel. A color filter is disposed on the least one dielectric layer. A microlens array is disposed on the color filter of the pixel, and the sum of the thickness of all dielectric layers and the color filter divided by the pixel width is equal to or less than approximately 1.87.

Abstract translation: 互补金属氧化物半导体场效应晶体管（CMOS-FET）图像传感器。 在基板上形成有源感光像素。 像素的至少一侧具有等于或小于约3μm的宽度。 在覆盖像素的基板上设置至少一个电介质层。 滤色器设置在至少一个电介质层上。 微透镜阵列设置在像素的滤色器上，所有电介质层和滤色器的厚度之和除以像素宽度等于或小于约1.87。

公开(公告)号：US20050164440A1

公开(公告)日：2005-07-28

申请号：US11084305

申请日：2005-03-18

Applicant: Dun-Nian Yaung ,  Sou-Kuo Wu ,  Ho-Ching Chien

Inventor： Dun-Nian Yaung ,  Sou-Kuo Wu ,  Ho-Ching Chien

IPC: H01L21/336 ,  H01L21/8242 ,  H01L27/06 ,  H01L27/108 ,  H01L27/146 ,  H01L21/8234

CPC classification number: H01L27/10894 ,  H01L27/0629 ,  H01L27/10897 ,  H01L27/14601 ,  H01L27/14609 ,  H01L27/14689 ,  H01L29/665

Abstract: A method of fabricating a salicided MOS and a one-sided salicided MOS device on a semiconductor substrate. A conformal oxide layer and an organic layer are sequentially formed on first and second MOS devices and the substrate. The first MOS has a first gate structure, a first spacer and first and second doped regions. The second MOS has a second gate structure, a second spacer and third and fourth doped regions. Anisotropic etching is performed to remove part of the organic layer until the oxide layer on the first and the second gate structures is exposed, wherein a remaining organic layer is left above the substrate. The oxide layer on the first and the second gate structures is removed. The remaining organic layer is removed. The oxide layer on the first, second, and third doped regions is removed. Thus, a silicide layer cannot form on the fourth doped region.

Abstract translation: 一种在半导体衬底上制造水化MOS和单面水化MOS器件的方法。 在第一和第二MOS器件和衬底上依次形成保形氧化物层和有机层。 第一MOS具有第一栅极结构，第一间隔物以及第一和第二掺杂区域。 第二MOS具有第二栅极结构，第二间隔物和第三和第四掺杂区域。 进行各向异性蚀刻以除去部分有机层，直到暴露出第一和第二栅极结构上的氧化物层，其中剩余的有机层留在衬底上。 去除第一和第二栅极结构上的氧化物层。 剩下的有机层被去除。 去除第一，第二和第三掺杂区域上的氧化物层。 因此，在第四掺杂区域上不能形成硅化物层。

公开(公告)号：US20050093086A1

公开(公告)日：2005-05-05

申请号：US10701670

申请日：2003-11-04

Applicant: Dunn-Nian Yaung ,  Shou-Gwo Wuu ,  Ho-Ching Chien ,  Yi-Shing Chang

Inventor： Dunn-Nian Yaung ,  Shou-Gwo Wuu ,  Ho-Ching Chien ,  Yi-Shing Chang

IPC: H01L27/14

CPC classification number: H01L31/02002

Abstract: Each of an elevated diode sensor optoelectronic product and a method for fabricating the elevated diode sensor optoelectronic product employs a sidewall passivation dielectric layer passivating a sidewall of a patterned conductor layer which serves as a bottom electrode for an elevated diode within the elevated diode sensor optoelectronic product. The sidewall passivation dielectric layer eliminates contact between the patterned conductor layer and an intrinsic diode material layer within the elevated diode, thus providing enhanced performance of the elevated diode sensor optoelectronic product.

Abstract translation: 升高的二极管传感器光电子产品和制造高二极管传感器光电子产品的方法中的每一个使用侧壁钝化介电层，钝化图案化导体层的侧壁，其用作升高的二极管传感器光电子产品中的升高的二极管的底部电极 。 侧壁钝化介质层消除了图案化的导体层和升高的二极管内的本征二极管材料层之间的接触，从而提高了升高的二极管传感器光电产品的性能。

公开(公告)号：US20050062118A1

公开(公告)日：2005-03-24

申请号：US10669516

申请日：2003-09-24

Applicant: Dun-Nian Yaung ,  Shou-Gwo Wuu ,  Ho-Ching Chien ,  Chien-Hsien Tseng ,  Jeng-Shyan Lin

Inventor： Dun-Nian Yaung ,  Shou-Gwo Wuu ,  Ho-Ching Chien ,  Chien-Hsien Tseng ,  Jeng-Shyan Lin

IPC: H01L21/00 ,  H01L21/82 ,  H01L27/14 ,  H01L27/146 ,  H01L29/82 ,  H01L31/00 ,  H04N5/335

CPC classification number: H01L31/103 ,  H01L27/1463 ,  H01L27/14632 ,  H01L27/14643 ,  H01L31/02161

Abstract: The present invention is a CMOS image sensor and its method of fabrication. This invention provides an efficient structure to improve the quantum efficiency of a CMOS image sensor with borderless contact. The image sensor comprises a N-well/P-substrate type photodiode with borderless contact and dielectric structure covering the photodiode region. The dielectric structure is located between the photodiode and the interlevel dielectric (ILD) and is used as a buffer layer for the borderless contact. The method of fabricating a high performance photodiode comprises forming a photodiode in the n-well region of a shallow trench, and embedding a dielectric material between the ILD oxide and the photodiode having a refraction index higher than the ILD oxide.

Abstract translation: 本发明是CMOS图像传感器及其制造方法。 本发明提供了一种提高无边界接触CMOS图像传感器的量子效率的有效结构。 图像传感器包括覆盖光电二极管区域的无接触接触和介电结构的N阱/ P基板型光电二极管。 电介质结构位于光电二极管和层间电介质（ILD）之间，用作无边界接触的缓冲层。 制造高性能光电二极管的方法包括在浅沟槽的n阱区域中形成光电二极管，并且在ILD氧化物和具有高于ILD氧化物的折射率的光电二极管之间嵌入电介质材料。