公开(公告)号：US10531575B2

公开(公告)日：2020-01-07

申请号：US16072367

申请日：2016-04-01

Applicant: INTEL CORPORATION

Inventor： Sandeep Sane ,  Timothy Swettlen

IPC: H05K3/40 ,  H05K3/34 ,  H01L23/498

Abstract: The systems and methods described herein are directed to using a plurality of interface elements (e.g., sockets) and/or stud-bump elements embedded into board substrates (e.g., a motherboard) to enable the interchange of variable configuration components (e.g., electronic components, chips, and the like) that are mounted on package substrates having ball grid arrays (BGAs). In some aspects, this interchange can be accomplished while leaving the pre-existing board substrate design and various peripheral system components of the board substrate unchanged.

公开(公告)号：US12038858B2

公开(公告)日：2024-07-16

申请号：US17067334

申请日：2020-10-09

Applicant: Intel Corporation

Inventor： Anshuman Thakur ,  Dheeraj Subareddy ,  Md Altaf Hossain ,  Ankireddy Nalamalpu ,  Mahesh Kumashikar ,  Sandeep Sane

IPC: G06F13/20 ,  G06F13/40 ,  H01L25/16

CPC classification number: G06F13/20 ,  G06F2213/40

Abstract: A processor package module comprises a substrate, one or more compute die mounted to the substrate, and one or more photonic die mounted to the substrate. The photonic die have N optical I/O links to transmit and receive optical I/O signals using a plurality of virtual optical channels, the N optical I/O links corresponding to different types of I/O interfaces excluding power and ground I/O. The substrate is mounted into a socket that support the power and ground I/O and electrical connections between the one or more compute die and the one or more photonic die.